Clock gating for power saving in ARM Architecture - Time & Space Complexity

Time Complexity: Clock gating for power saving

O(n)

Understanding Time Complexity

We want to understand how clock gating affects the time cost of running ARM processor instructions.

Specifically, how does adding clock gating change the number of operations as workload grows?

Scenario Under Consideration

Analyze the time complexity of the following ARM assembly snippet with clock gating control.

    MOV R0, #0          ; Initialize counter
LOOP:
    CMP R0, R1          ; Compare counter with input size
    BGE END             ; Exit if counter >= input
    ; Clock gating control
    STRB R2, [R3]       ; Enable clock to module
    ; Perform operation
    ADD R0, R0, #1      ; Increment counter
    B LOOP              ; Repeat loop
END:
    ; Disable clock
    STRB R4, [R3]       ; Disable clock to module
    

This code loops from 0 to input size R1, enabling clock gating before work and disabling after.

Identify Repeating Operations

Look for repeated instructions that affect execution time.

• Primary operation: The loop runs from 0 to R1, repeating clock gating enable, work, and increment.
• How many times: The loop runs approximately n times, where n is the input size in R1.

How Execution Grows With Input

As input size increases, the loop runs more times, so operations grow linearly.

Input Size (n)	Approx. Operations
10	About 10 loop cycles
100	About 100 loop cycles
1000	About 1000 loop cycles

Pattern observation: The number of operations grows directly in proportion to input size.

Final Time Complexity

Time Complexity: O(n)

This means the time to complete the loop grows in a straight line as input size increases.

Common Mistake

[X] Wrong: "Clock gating reduces the number of loop iterations or makes the code run faster in terms of loop count."

[OK] Correct: Clock gating saves power by stopping the clock signal to parts of the chip, but it does not reduce how many times the loop runs or the number of instructions executed.

Interview Connect

Understanding how clock gating affects execution helps you explain power-saving techniques without confusing them with speed improvements.

Self-Check

What if we moved the clock gating enable instruction outside the loop? How would that change the time complexity?