Stack pointer (R13/SP) in ARM Architecture - Time & Space Complexity

Time Complexity: Stack pointer (R13/SP)

O(n)

Understanding Time Complexity

Analyzing time complexity helps us understand how the use of the stack pointer affects program speed as more data is pushed or popped.

We want to know how the number of stack operations grows when the program uses more memory on the stack.

Scenario Under Consideration

Analyze the time complexity of the following ARM instructions using the stack pointer.

    PUSH {R0-R3}      ; Save registers on stack
    ...               ; Some operations
    POP {R0-R3}       ; Restore registers from stack
    

This code saves four registers onto the stack and later restores them, adjusting the stack pointer accordingly.

Identify Repeating Operations

Look for repeated stack operations that affect execution time.

• Primary operation: PUSH and POP instructions that move data to and from the stack.
• How many times: Each PUSH or POP moves multiple registers at once, but each register is handled individually in hardware.

How Execution Grows With Input

As the number of registers saved or restored increases, the time to complete PUSH or POP grows proportionally.

Number of Registers	Approx. Operations
2	2 moves
4	4 moves
8	8 moves

Pattern observation: The time grows linearly with the number of registers pushed or popped.

Final Time Complexity

Time Complexity: O(n)

This means the time to push or pop grows directly with how many registers are involved.

Common Mistake

[X] Wrong: "Pushing multiple registers is a single, constant-time operation regardless of count."

[OK] Correct: Each register requires a separate memory write or read, so more registers mean more time.

Interview Connect

Understanding how stack operations scale helps you reason about function calls and memory use in low-level programming, a useful skill in many technical roles.

Self-Check

"What if we used a different register instead of the stack pointer for pushing and popping? How would that affect the time complexity?"

Practice

1. What is the primary role of the stack pointer (R13/SP) in ARM processors?

easy

A. It tracks the top of the stack during program execution.

B. It stores the current instruction being executed.

C. It holds the address of the program's entry point.

D. It manages the processor's clock speed.

Solution

1. Step 1: Understand the stack pointer's function

   The stack pointer (R13/SP) is a special register that points to the top of the stack in memory.

2. Step 2: Identify its role in program execution

   It helps manage data pushed onto or popped from the stack, such as function calls and local variables.

3. Final Answer:

   It tracks the top of the stack during program execution. -> Option A

4. Quick Check:

   Stack pointer = top of stack tracker [OK]

Hint: Stack pointer always points to the current top of the stack [OK]

Common Mistakes:

• Confusing stack pointer with program counter
• Thinking it stores instructions
• Assuming it controls processor speed

2. Which of the following is the register number for the stack pointer register in ARM assembly?

easy

A. R14

B. R13

C. SP

D. PC

Solution

1. Step 1: Recall ARM register naming

   In ARM architecture, R13 is the register used as the stack pointer.

2. Step 2: Match register names to functions

   R14 is the link register, PC is the program counter, and SP is an alias for R13.

3. Final Answer:

   R13 -> Option B

4. Quick Check:

   Stack pointer register = R13 [OK]

Hint: Remember R13 is SP, R14 is LR, PC is R15 [OK]

Common Mistakes:

• Confusing R13 with R14 (link register)
• Thinking SP is the register number
• Confusing it with PC (R15)

3. Consider this ARM assembly snippet:

SUB SP, SP, #4
STR R0, [SP]
ADD SP, SP, #4

What does this code do to the stack pointer?

medium

A. Moves SP down by 4, stores R0, then moves SP back up by 4

B. Moves SP up by 4, stores R0, then moves SP down by 4

C. Stores R0 without changing SP

D. Causes a runtime error due to invalid SP manipulation

Solution

1. Step 1: Analyze the SUB instruction

   SUB SP, SP, #4 decreases SP by 4, moving the stack pointer down to allocate space.

2. Step 2: Understand STR and ADD instructions

   STR R0, [SP] stores the value of R0 at the new top of the stack. ADD SP, SP, #4 restores SP back up by 4.

3. Final Answer:

   Moves SP down by 4, stores R0, then moves SP back up by 4 -> Option A

4. Quick Check:

   SUB decreases SP, ADD restores SP [OK]

Hint: SUB decreases SP (push), ADD increases SP (pop) [OK]

Common Mistakes:

• Mixing up SUB and ADD effects on SP
• Assuming SP does not change
• Thinking this causes an error

4. In ARM assembly, a programmer writes:

ADD SP, SP, #8
LDR R1, [SP, #-4]

What is the problem with this code?

medium

A. There is no problem; code works as intended.

B. The immediate value #8 is invalid for ADD instruction.

C. LDR cannot use negative offsets in ARM assembly.

D. SP is moved up before loading, causing incorrect address access.

Solution

1. Step 1: Examine ADD SP, SP, #8

   This moves SP up by 8, effectively popping 8 bytes off the stack.

2. Step 2: Analyze LDR with negative offset

   LDR R1, [SP, #-4] tries to load from SP minus 4 bytes, but since SP moved up, this address may not point to the intended data.

3. Step 3: Identify the problem

   Moving SP up before loading causes the load to access an incorrect or invalid memory location.

4. Final Answer:

   SP is moved up before loading, causing incorrect address access. -> Option D

5. Quick Check:

   SP must point correctly before LDR [OK]

Hint: Adjust SP after loading, not before, to avoid wrong addresses [OK]

Common Mistakes:

• Assuming negative offsets are invalid
• Ignoring SP movement effect on address
• Believing immediate #8 is illegal

5. You want to save registers R0 to R3 on the stack before a function call and restore them after. Which ARM assembly sequence correctly uses the stack pointer (R13/SP) to do this?

hard

A. SUB SP, SP, #4
STR R0, [SP]
STR R1, [SP, #4]
STR R2, [SP, #8]
STR R3, [SP, #12]
...function call...
LDMIA SP!, {R0-R3}

B. ADD SP, SP, #16
STR R0, [SP]
STR R1, [SP, #4]
STR R2, [SP, #8]
STR R3, [SP, #12]
...function call...
LDMFD SP!, {R0-R3}

C. SUB SP, SP, #16
STR R0, [SP]
STR R1, [SP, #4]
STR R2, [SP, #8]
STR R3, [SP, #12]
...function call...
LDMIA SP!, {R0-R3}

D. SUB SP, SP, #16
STR R0, [SP, #12]
STR R1, [SP, #8]
STR R2, [SP, #4]
STR R3, [SP]
...function call...
LDMIA SP!, {R0-R3}

Solution

1. Step 1: Allocate stack space for 4 registers

   SUB SP, SP, #16 reserves 16 bytes (4 registers x 4 bytes each) by moving SP down.

2. Step 2: Store registers in ascending order

   STR instructions store R0 at [SP], R1 at [SP+4], R2 at [SP+8], and R3 at [SP+12], matching stack layout.

3. Step 3: Restore registers after function call

   LDMIA SP!, {R0-R3} loads multiple registers and increments SP, restoring original SP value.

4. Final Answer:

   The sequence using SUB SP, SP, #16, ordered STRs, and LDMIA SP!, {R0-R3} -> Option C

5. Quick Check:

   SUB allocates, STR stores, LDMIA restores [OK]

Hint: Subtract before storing, add after loading with LDMIA SP! [OK]

Common Mistakes:

• Using ADD instead of SUB to allocate stack space
• Incorrect offsets for storing registers
• Reversing order of stored registers
• Using wrong load multiple instruction