Program counter (R15/PC) in ARM Architecture - Step-by-Step Execution

Concept Flow - Program counter (R15/PC)

Start Instruction

↓

Fetch Instruction at PC

↓

Decode Instruction

↓

Execute Instruction

↓

Update PC to Next Instruction

↓

Repeat Cycle

The program counter (PC) holds the address of the next instruction to execute. Each cycle fetches, decodes, executes, then updates PC to continue.

Execution Sample

ARM Architecture

PC = 0x1000
Instruction = MEMORY[PC]
Execute(Instruction)
PC = PC + 4

This shows how the PC points to the current instruction, executes it, then moves to the next instruction address.

Analysis Table

Step	PC Value (Hex)	Action	Instruction Fetched	Next PC Value
1	0x1000	Fetch instruction	LOAD R1, [R2]	0x1004
2	0x1000	Execute LOAD	LOAD R1, [R2]	0x1004
3	0x1004	Fetch instruction	ADD R3, R1, #1	0x1008
4	0x1004	Execute ADD	ADD R3, R1, #1	0x1008
5	0x1008	Fetch instruction	B 0x1010	0x100C
6	0x1008	Execute Branch (update PC)	B 0x1010	0x1010
7	0x1010	Fetch instruction	SUB R4, R3, #2	0x1014
8	0x1010	Execute SUB	SUB R4, R3, #2	0x1014
9	0x1014	Fetch instruction	END	0x1018
10	0x1014	No instruction (end)	None	0x1018

💡 Execution stops when no valid instruction is found at PC address.

State Tracker

Variable	Start	After Step 1	After Step 3	After Step 5	After Step 6	After Step 7	Final
PC	0x1000	0x1004	0x1008	0x100C	0x1010	0x1014	0x1018

Key Insights - 3 Insights

Why does the PC sometimes jump to a non-sequential address?

Because of branch instructions like at step 6, the PC updates to the branch target address (0x1010) instead of the next sequential address.

Does the PC update before or after executing an instruction?

The PC updates after fetching and executing the current instruction, as shown between steps 1 and 2, and steps 5 and 6.

What happens if the PC points to an invalid address?

Execution stops because no valid instruction can be fetched, as seen at step 10 where no instruction is found.

Visual Quiz - 3 Questions

Look at the execution table, what is the PC value after executing the branch instruction?

A 0x1010

B 0x100C

C 0x1008

D 0x1014

💡 Hint

Check step 6 in the execution_table where the branch updates the PC.

At which step does the PC first move from 0x1000 to 0x1004?

A Step 2

B Step 3

C Step 1

D Step 4

💡 Hint

Look at the PC value change in the execution_table between steps 1 and 2.

If the branch instruction at step 6 was removed, what would the PC value be at step 7?

A 0x1008

B 0x100C

C 0x1010

D 0x1014

💡 Hint

Without branch, PC increments sequentially; check variable_tracker PC values.

Concept Snapshot

Program Counter (PC) holds the address of the next instruction.
Each cycle: fetch instruction at PC, execute it, then update PC.
PC usually increments by 4 (ARM 32-bit instructions).
Branch instructions change PC to a new address.
If PC points to invalid memory, execution stops.

Full Transcript

The program counter (PC), also known as register R15 in ARM architecture, keeps track of the address of the next instruction to execute. The CPU fetches the instruction at the PC address, decodes and executes it, then updates the PC to point to the following instruction. Normally, the PC increments by 4 bytes because ARM instructions are 4 bytes long. However, branch instructions can change the PC to a different address, causing the program to jump. If the PC points to an invalid address where no instruction exists, the execution stops. This step-by-step trace shows how the PC changes during instruction fetch and execution cycles.

Practice

1. What is the primary role of the Program Counter (PC) in ARM architecture?

easy

A. It holds the address of the next instruction to execute.

B. It stores the result of arithmetic operations.

C. It manages input/output operations.

D. It controls the power management of the processor.

Solution

1. Step 1: Understand the function of PC

   The Program Counter (PC) is a special register that keeps track of the address of the next instruction to be executed in the program.

2. Step 2: Compare with other options

   Other options describe functions of different registers or components, not the PC.

3. Final Answer:

   It holds the address of the next instruction to execute. -> Option A

4. Quick Check:

   PC = Next instruction address [OK]

Hint: PC always points to the next instruction address [OK]

Common Mistakes:

• Confusing PC with general-purpose registers
• Thinking PC stores data instead of addresses
• Mixing PC role with I/O or power control

2. Which register number corresponds to the Program Counter (PC) in ARM processors?

easy

A. R14

B. R13

C. R15

D. R12

Solution

1. Step 1: Recall ARM register naming

   In ARM architecture, the Program Counter is known as register R15.

2. Step 2: Verify other register roles

   R14 is the Link Register, R13 is the Stack Pointer, and R12 is a general-purpose register.

3. Final Answer:

   R15 -> Option C

4. Quick Check:

   PC = R15 [OK]

Hint: PC is always R15 in ARM [OK]

Common Mistakes:

• Confusing PC with Link Register (R14)
• Mixing up Stack Pointer (R13) with PC
• Assuming PC is a general-purpose register

3. Consider this ARM assembly snippet:

ADD R0, R0, #4
MOV PC, R0

What happens when the MOV PC, R0 instruction executes?

medium

A. The program jumps to the address stored in R0.

B. The value in R0 is added to the PC without changing flow.

C. The PC is set to zero, causing a reset.

D. The instruction causes a syntax error.

Solution

1. Step 1: Understand MOV PC, R0

   Moving a value into PC changes the program flow to the address in R0, causing a jump.

2. Step 2: Analyze the ADD instruction

   ADD R0, R0, #4 increments R0 by 4, so PC will jump to this new address.

3. Final Answer:

   The program jumps to the address stored in R0. -> Option A

4. Quick Check:

   Setting PC = R0 causes jump [OK]

Hint: MOV to PC changes program flow to that address [OK]

Common Mistakes:

• Thinking MOV PC,R0 just copies value without jump
• Assuming PC increments automatically ignoring MOV
• Believing MOV PC,R0 causes error

4. Identify the error in this ARM assembly code snippet:

MOV PC, #1000

What is wrong with this instruction?

medium

A. The immediate value #1000 is too large for MOV instruction.

B. You cannot move an immediate value directly into PC.

C. PC cannot be used as a destination register.

D. MOV instruction requires two registers, not immediate values.

Solution

1. Step 1: Understand MOV limitations with PC

   In ARM, you cannot move an immediate value directly into PC; it must come from a register.

2. Step 2: Check other options

   PC can be destination, MOV can use immediate but not directly to PC, and #1000 size is not the main issue here.

3. Final Answer:

   You cannot move an immediate value directly into PC. -> Option B

4. Quick Check:

   Immediate to PC invalid [OK]

Hint: MOV immediate to PC is invalid; use register first [OK]

Common Mistakes:

• Trying to load PC directly with immediate values
• Confusing PC with general-purpose registers
• Assuming MOV always accepts immediate to any register

5. In ARM assembly, how can you implement a conditional jump to address stored in R4 only if R1 equals zero, using the Program Counter (PC)?

hard

A. Use JMP R4 if R1 equals zero.

B. Use BEQ R4 to jump if R1 is zero.

C. Use MOV PC, R4 unconditionally after checking R1.

D. Use CMP R1, #0 followed by MOVEQ PC, R4.

Solution

1. Step 1: Compare R1 with zero

   The CMP R1, #0 instruction sets condition flags based on R1's value.

2. Step 2: Use conditional move to PC

   MOVEQ PC, R4 moves R4 into PC only if the zero flag is set (R1 == 0), causing a conditional jump.

3. Final Answer:

   Use CMP R1, #0 followed by MOVEQ PC, R4. -> Option D

4. Quick Check:

   Conditional MOV to PC enables jump [OK]

Hint: Use CMP then conditional MOV to PC for jumps [OK]

Common Mistakes:

• Using BEQ with a register operand (invalid syntax)
• Unconditionally moving PC ignoring condition
• Using JMP which is not an ARM instruction