Program counter (R15/PC) in ARM Architecture - Deep Dive

Overview - Program counter (R15/PC)

What is it?

The program counter, often called PC or R15 in ARM architecture, is a special register that holds the address of the next instruction the processor will execute. It automatically updates as the processor runs instructions, guiding the flow of the program. Think of it as a pointer that tells the processor where to look next in memory. Without it, the processor wouldn't know which instruction to run next.

Why it matters

The program counter exists to keep the processor on track through a program's instructions. Without it, the processor would have no way to know the order of instructions, making it impossible to run any software correctly. This would mean computers couldn't perform tasks, run apps, or even boot up. The PC ensures smooth, sequential execution and enables jumps and branches, which are essential for decision-making in programs.

Where it fits

Before understanding the program counter, learners should know basic computer architecture concepts like registers and memory. After grasping the PC, learners can explore instruction execution flow, branching, interrupts, and how processors handle function calls and loops.

Mental Model

Core Idea

The program counter is a special register that always points to the next instruction to execute, guiding the processor through the program step-by-step.

Think of it like...

Imagine reading a book with a bookmark that always shows the next page to read. The program counter is like that bookmark, keeping track of where you are in the story so you don't get lost.

┌───────────────┐
│ Program Memory│
│  [Instr 1]    │
│  [Instr 2]    │
│  [Instr 3]    │
│  [Instr 4]    │
└─────┬─────────┘
      │
      ▼
┌───────────────┐
│   Program     │
│   Counter     │
│   (R15/PC)    │
│   Points to   │
│   Next Instr  │
└───────────────┘
      │
      ▼
┌───────────────┐
│ Processor     │
│ Executes      │
│ Instruction   │
└───────────────┘

Build-Up - 7 Steps

1

Foundation

What is a Register in ARM

Concept: Registers are small storage locations inside the processor used to hold data and addresses temporarily.

In ARM processors, registers are like tiny boxes that hold numbers or addresses. There are general-purpose registers (R0 to R14) and special registers like R15, which is the program counter. Registers allow the processor to quickly access data without going to slower memory.

Result

Learners understand that registers are fast storage inside the CPU and that R15 is a special register.

Knowing what registers are is essential because the program counter is one of these registers, but with a unique role.

2

Foundation

Basic Role of the Program Counter

Concept: The program counter holds the address of the next instruction to execute in the program memory.

When a program runs, the processor needs to know which instruction to execute next. The program counter (PC) stores this address. After executing an instruction, the PC updates to point to the following instruction, usually by adding the size of one instruction.

Result

Learners see that the PC moves forward through instructions automatically.

Understanding that the PC controls the flow of execution helps learners grasp how programs run step-by-step.

3

Intermediate

How the PC Updates During Execution

🤔Before reading on: do you think the PC always increases by the same amount after each instruction, or can it change differently? Commit to your answer.

Concept: The PC usually increments by the instruction size but can change to a different address during jumps or branches.

In ARM, instructions are typically 4 bytes long, so the PC adds 4 after each instruction. However, when the program needs to jump to a different part (like in loops or function calls), the PC is set to a new address instead of just moving forward.

Result

Learners understand that the PC can both move sequentially and jump to new locations.

Knowing that the PC can change unpredictably during branches is key to understanding program control flow.

4

Intermediate

PC as Register R15 and Its Special Behavior

🤔Before reading on: do you think the PC behaves exactly like other registers, or does it have unique features? Commit to your answer.

Concept: In ARM, the PC is register number 15 (R15) but has special behavior when read or written.

While R15 is accessible like other registers, reading it returns the current PC value plus an offset (usually 8 bytes ahead) due to pipelining. Writing to R15 changes the flow of execution, effectively causing a jump to the new address.

Result

Learners realize that PC is both a register and a control mechanism with unique rules.

Understanding the PC's special behavior explains why reading or writing it affects program flow differently than other registers.

5

Intermediate

PC and Instruction Pipelining Interaction

Concept: The PC value reflects the processor's pipeline stage, causing it to point ahead of the current instruction.

ARM processors use pipelining to speed up execution by fetching instructions before the current one finishes. Because of this, the PC points to an address ahead (usually 8 bytes) of the current instruction being executed. This means the PC value is not always the exact current instruction address.

Result

Learners understand why PC readings seem offset and how pipelining affects execution.

Knowing the pipeline effect on PC helps avoid confusion when debugging or reading PC values.

6

Advanced

Using PC for Position-Independent Code

🤔Before reading on: do you think the PC can be used to calculate addresses relative to itself, or is it only for absolute jumps? Commit to your answer.

Concept: The PC can be used to compute addresses relative to the current instruction, enabling flexible code that runs anywhere in memory.

By reading the PC value and adding or subtracting offsets, programs can access data or instructions relative to their current location. This technique is called position-independent code and is useful for shared libraries or embedded systems where code location may vary.

Result

Learners see how PC enables flexible and reusable code through relative addressing.

Understanding PC-relative addressing unlocks advanced programming techniques for portability and efficiency.

7

Expert

Surprising Effects of Writing to PC in ARM

🤔Before reading on: do you think writing any value to PC immediately changes program flow, or are there exceptions? Commit to your answer.

Concept: Writing to the PC register causes the processor to jump to the new address, but the exact behavior depends on the processor mode and instruction set state.

When a program writes a value to R15, the processor loads that value into the PC, causing a branch. However, if the least significant bit is set, it switches between ARM and Thumb instruction sets. Also, in some modes, writing to PC can trigger exceptions or behave differently. This subtlety is critical for low-level programming and debugging.

Result

Learners grasp the complexity and power of directly manipulating the PC.

Knowing these details prevents bugs and enables advanced control over program execution and mode switching.

Under the Hood

The program counter is a hardware register inside the ARM CPU that holds the memory address of the next instruction to fetch. The CPU's instruction fetch unit reads this address to get the instruction from memory. After fetching, the PC increments by 4 bytes (size of an ARM instruction) to point to the next instruction. Due to pipelining, the PC value seen by software is ahead of the current instruction. Writing to the PC changes the fetch address, causing jumps or branches. The CPU also uses the least significant bit of the PC to determine the instruction set state (ARM or Thumb).

Why designed this way?

The PC was designed as a register to allow flexible control of program flow, enabling jumps, branches, and function calls. Using a register rather than a fixed hardware pointer allows software to manipulate execution flow directly. The pipelining offset exists to optimize instruction throughput by overlapping fetch and execution stages. The dual use of the least significant bit for instruction set state was a clever design to support two instruction sets efficiently without extra registers.

┌───────────────┐
│   Program     │
│   Counter     │
│   (R15/PC)    │
└───────┬───────┘
        │ holds address
        ▼
┌───────────────┐
│ Instruction   │
│ Fetch Unit    │
└───────┬───────┘
        │ fetches instruction
        ▼
┌───────────────┐
│ Instruction   │
│ Decoder &     │
│ Execution     │
└───────────────┘

PC increments by 4 after fetch
Least significant bit of PC controls ARM/Thumb mode

Myth Busters - 4 Common Misconceptions

Quick: Does reading the PC always give the exact address of the current instruction? Commit to yes or no.

Common Belief: Reading the PC always returns the address of the instruction currently being executed.

Reality: Due to pipelining, reading the PC returns the address of the instruction plus an offset (usually 8 bytes ahead).

Why it matters: Assuming the PC points to the current instruction can cause confusion when debugging or calculating addresses, leading to incorrect code or analysis.

Quick: Does writing any value to PC just store it like a normal register? Commit to yes or no.

Common Belief: Writing a value to the PC simply stores that value without side effects.

Reality: Writing to the PC causes the processor to jump to the new address, changing program flow immediately.

Why it matters: Misunderstanding this can cause unexpected jumps or crashes when modifying PC, especially in low-level programming or debugging.

Quick: Is the PC always a separate special register, or can it be accessed like a general-purpose register? Commit to your answer.

Common Belief: The PC is a separate special register and cannot be accessed like other registers.

Reality: In ARM, the PC is register R15 and can be accessed like other registers, but with special behavior.

Why it matters: Knowing this helps programmers use PC in instructions and understand its unique effects.

Quick: Does the least significant bit of the PC have no special meaning? Commit to yes or no.

Common Belief: All bits of the PC represent the address equally, with no special meaning.

Reality: The least significant bit of the PC indicates the instruction set state (ARM or Thumb).

Why it matters: Ignoring this can cause incorrect instruction decoding and program crashes.

Expert Zone

1

The PC value read in software is always ahead due to the pipeline, so calculating exact instruction addresses requires adjusting for this offset.

2

Writing to PC with the least significant bit set switches the processor to Thumb mode, enabling mixed instruction sets within the same program.

3

In exception or interrupt modes, the PC behaves differently, sometimes pointing to saved return addresses rather than the next instruction.

When NOT to use

Directly manipulating the PC is risky and should be avoided in high-level code. Instead, use structured control flow like function calls and branches. For position-independent code, use PC-relative addressing carefully. In some real-time or safety-critical systems, direct PC writes are restricted to prevent unpredictable behavior.

Production Patterns

In real-world ARM software, the PC is used for branching, function returns, and position-independent addressing. Compilers generate PC-relative instructions for accessing constants and data. Low-level firmware and bootloaders manipulate PC directly for mode switching and exception handling. Debuggers read and modify PC to control program execution during debugging sessions.

Connections

Instruction Pipeline

The PC's value reflects the pipeline stage, linking instruction fetch and execution.

Understanding the PC's pipeline offset clarifies how processors overlap instruction stages for speed.

Function Call Stack

The PC works with the link register and stack to manage function calls and returns.

Knowing PC's role helps understand how programs jump to functions and return correctly.

Book Reading Progress Tracker

Both track the current position in a sequence to guide the next step.

Recognizing this pattern across fields shows how pointers or markers control flow in systems.

Common Pitfalls

#1 Assuming PC points to the current instruction when debugging.

Wrong approach:

Reading PC register and using its value directly as the current instruction address without adjustment.

Correct approach:

Adjust PC value by subtracting the pipeline offset (usually 8 bytes) to find the actual current instruction address.

Root cause:

Misunderstanding the effect of instruction pipelining on the PC value.

#2 Writing arbitrary values to PC without considering instruction set state.

Wrong approach:

MOV R15, #0x1000 ; Jump to address 0x1000 without setting LSB

Correct approach:

MOV R15, #0x1001 ; Jump to address 0x1000 and switch to Thumb mode by setting LSB

Root cause:

Ignoring the least significant bit's role in selecting ARM or Thumb mode.

#3 Using PC as a normal register without expecting side effects.

Wrong approach:

MOV R0, R15 ; Using PC value without accounting for pipeline offset or special behavior

Correct approach:

Use PC carefully, knowing it points ahead and affects program flow when written.

Root cause:

Treating PC like a general-purpose register without understanding its unique role.

Key Takeaways

The program counter (PC) is a special register (R15) that holds the address of the next instruction to execute.

Due to pipelining, the PC value read by software is ahead of the current instruction by a fixed offset.

Writing to the PC changes program flow immediately and can switch instruction sets based on the least significant bit.

The PC enables sequential execution, branching, and position-independent code by guiding the processor through instructions.

Understanding the PC's special behavior is essential for low-level programming, debugging, and efficient ARM software design.

Practice

1. What is the primary role of the Program Counter (PC) in ARM architecture?

easy

A. It holds the address of the next instruction to execute.

B. It stores the result of arithmetic operations.

C. It manages input/output operations.

D. It controls the power management of the processor.

Solution

1. Step 1: Understand the function of PC

   The Program Counter (PC) is a special register that keeps track of the address of the next instruction to be executed in the program.

2. Step 2: Compare with other options

   Other options describe functions of different registers or components, not the PC.

3. Final Answer:

   It holds the address of the next instruction to execute. -> Option A

4. Quick Check:

   PC = Next instruction address [OK]

Hint: PC always points to the next instruction address [OK]

Common Mistakes:

• Confusing PC with general-purpose registers
• Thinking PC stores data instead of addresses
• Mixing PC role with I/O or power control

2. Which register number corresponds to the Program Counter (PC) in ARM processors?

easy

A. R14

B. R13

C. R15

D. R12

Solution

1. Step 1: Recall ARM register naming

   In ARM architecture, the Program Counter is known as register R15.

2. Step 2: Verify other register roles

   R14 is the Link Register, R13 is the Stack Pointer, and R12 is a general-purpose register.

3. Final Answer:

   R15 -> Option C

4. Quick Check:

   PC = R15 [OK]

Hint: PC is always R15 in ARM [OK]

Common Mistakes:

• Confusing PC with Link Register (R14)
• Mixing up Stack Pointer (R13) with PC
• Assuming PC is a general-purpose register

3. Consider this ARM assembly snippet:

ADD R0, R0, #4
MOV PC, R0

What happens when the MOV PC, R0 instruction executes?

medium

A. The program jumps to the address stored in R0.

B. The value in R0 is added to the PC without changing flow.

C. The PC is set to zero, causing a reset.

D. The instruction causes a syntax error.

Solution

1. Step 1: Understand MOV PC, R0

   Moving a value into PC changes the program flow to the address in R0, causing a jump.

2. Step 2: Analyze the ADD instruction

   ADD R0, R0, #4 increments R0 by 4, so PC will jump to this new address.

3. Final Answer:

   The program jumps to the address stored in R0. -> Option A

4. Quick Check:

   Setting PC = R0 causes jump [OK]

Hint: MOV to PC changes program flow to that address [OK]

Common Mistakes:

• Thinking MOV PC,R0 just copies value without jump
• Assuming PC increments automatically ignoring MOV
• Believing MOV PC,R0 causes error

4. Identify the error in this ARM assembly code snippet:

MOV PC, #1000

What is wrong with this instruction?

medium

A. The immediate value #1000 is too large for MOV instruction.

B. You cannot move an immediate value directly into PC.

C. PC cannot be used as a destination register.

D. MOV instruction requires two registers, not immediate values.

Solution

1. Step 1: Understand MOV limitations with PC

   In ARM, you cannot move an immediate value directly into PC; it must come from a register.

2. Step 2: Check other options

   PC can be destination, MOV can use immediate but not directly to PC, and #1000 size is not the main issue here.

3. Final Answer:

   You cannot move an immediate value directly into PC. -> Option B

4. Quick Check:

   Immediate to PC invalid [OK]

Hint: MOV immediate to PC is invalid; use register first [OK]

Common Mistakes:

• Trying to load PC directly with immediate values
• Confusing PC with general-purpose registers
• Assuming MOV always accepts immediate to any register

5. In ARM assembly, how can you implement a conditional jump to address stored in R4 only if R1 equals zero, using the Program Counter (PC)?

hard

A. Use JMP R4 if R1 equals zero.

B. Use BEQ R4 to jump if R1 is zero.

C. Use MOV PC, R4 unconditionally after checking R1.

D. Use CMP R1, #0 followed by MOVEQ PC, R4.

Solution

1. Step 1: Compare R1 with zero

   The CMP R1, #0 instruction sets condition flags based on R1's value.

2. Step 2: Use conditional move to PC

   MOVEQ PC, R4 moves R4 into PC only if the zero flag is set (R1 == 0), causing a conditional jump.

3. Final Answer:

   Use CMP R1, #0 followed by MOVEQ PC, R4. -> Option D

4. Quick Check:

   Conditional MOV to PC enables jump [OK]

Hint: Use CMP then conditional MOV to PC for jumps [OK]

Common Mistakes:

• Using BEQ with a register operand (invalid syntax)
• Unconditionally moving PC ignoring condition
• Using JMP which is not an ARM instruction