ADD R0, R1, R2 if R1 contains 5 and R2 contains 10?The ADD instruction adds the values in R1 and R2 (5 + 10) and stores the result (15) in R0.
CMP subtracts the second operand from the first but does not store the result. Instead, it updates the condition flags (like zero, negative) to be used by conditional instructions.
SUB R5, R3, R4 in ARM assembly?SUB subtracts R4 from R3: 8 - 12 = -4. Since ARM registers are 32-bit, -4 is stored as 0xFFFFFFFC in two's complement form.
MOV simply copies the value from the source register to the destination register. ADD performs arithmetic addition of two registers and stores the result.
CMP R6, R7?CMP subtracts R7 from R6 (20 - 20 = 0). Since the result is zero, the Zero flag is set to 1, indicating equality.
