What if your program could collect sensor data without lifting a finger?
Why Peripheral-to-memory transfer in Embedded C? - Purpose & Use Cases
Imagine you have a sensor sending data byte by byte, and your program must read each byte and store it in memory manually.
You write code that waits for each byte, reads it, and then saves it to an array one by one.
This manual reading is slow because the CPU must stop what it is doing to wait for each byte.
It wastes time and can miss data if it is busy with other tasks.
Also, writing code to handle each byte is error-prone and hard to maintain.
Peripheral-to-memory transfer lets the hardware move data directly from the sensor to memory without CPU involvement.
This frees the CPU to do other work and ensures data is captured quickly and reliably.
while(!data_ready()) {}
buffer[i++] = read_data();start_dma_transfer(sensor, buffer, length);
This concept enables efficient, fast, and reliable data collection from peripherals without slowing down the main program.
In a weather station, sensor data like temperature and humidity can be transferred directly to memory while the CPU processes other tasks like display updates.
Manual data reading wastes CPU time and risks missing data.
Peripheral-to-memory transfer automates data movement using hardware.
This improves speed, reliability, and frees CPU for other tasks.
Practice
Solution
Step 1: Understand peripheral-to-memory transfer
This transfer moves data directly from a peripheral device to memory, bypassing the CPU to improve efficiency.Step 2: Identify the main purpose
The main goal is to reduce CPU load by letting hardware handle data movement.Final Answer:
To move data directly from a peripheral device to memory without CPU intervention -> Option CQuick Check:
Peripheral-to-memory transfer = direct data move without CPU [OK]
- Confusing peripheral-to-memory with memory-to-peripheral transfer
- Thinking CPU processes data during transfer
- Assuming transfer resets the device
Solution
Step 1: Understand DMA enable bit setting
To enable DMA channel, the enable bit (DMA_CCR_EN) must be set using bitwise OR to preserve other bits.Step 2: Analyze options
DMA_Channel->CCR |= DMA_CCR_EN; sets the enable bit correctly with |=. DMA_Channel->CCR = 0; clears all bits, disabling DMA. DMA_Channel->CCR &= ~DMA_CCR_EN; clears the enable bit. DMA_Channel->CCR = DMA_CCR_EN << 1; shifts enable bit incorrectly.Final Answer:
DMA_Channel->CCR |= DMA_CCR_EN; -> Option BQuick Check:
Enable DMA by setting bit with |= [OK]
- Using = instead of |= clears other bits
- Clearing enable bit instead of setting it
- Shifting bits incorrectly
uint8_t peripheral_data = 0x55;
uint8_t memory_buffer[1] = {0x00};
// DMA configured to transfer 1 byte from &peripheral_data to memory_buffer
// DMA transfer completes here
Solution
Step 1: Understand DMA transfer setup
DMA is set to transfer 1 byte from peripheral_data (0x55) to memory_buffer.Step 2: Determine memory_buffer[0] after transfer
After transfer, memory_buffer[0] will hold the value 0x55 copied from peripheral_data.Final Answer:
0x55 -> Option AQuick Check:
DMA copies 0x55 to memory_buffer[0] [OK]
- Assuming memory_buffer stays unchanged
- Confusing peripheral_data value
- Thinking DMA sets memory to 0xFF
DMA_Channel->CPAR = (uint32_t)&memory_buffer; DMA_Channel->CMAR = (uint32_t)&peripheral_data; DMA_Channel->CNDTR = 4; DMA_Channel->CCR &= ~DMA_CCR_EN; DMA_Channel->CCR |= DMA_CCR_EN;
Solution
Step 1: Recall DMA register roles
CPAR holds peripheral (source) address, CMAR holds memory (destination) address for peripheral-to-memory transfer.Step 2: Check the code assignments
The code sets CPAR = &memory_buffer (should be peripheral), CMAR = &peripheral_data (should be memory). Addresses are swapped.Final Answer:
The peripheral address and memory address are swapped -> Option DQuick Check:
CPAR=peripheral, CMAR=memory [OK]
- Swapping peripheral and memory addresses
- Enabling DMA before setting parameters
- Not disabling DMA before re-enabling
Solution
Step 1: Identify source and destination
Source is UART data register (peripheral), destination is memory buffer.Step 2: Set DMA registers correctly
Peripheral address register (CPAR) must point to UART data register, memory address register (CMAR) to buffer, transfer length to 8 bytes, then enable DMA channel.Final Answer:
Set DMA peripheral address to UART data register; set memory address to buffer; set transfer length to 8; enable DMA channel -> Option AQuick Check:
Peripheral = source, Memory = destination, length set before enable [OK]
- Swapping peripheral and memory addresses
- Enabling DMA before setting addresses and length
- Setting transfer length after enabling DMA
Ready to prove it?
Pass the test and this pattern moves unknown
