Peripheral-to-memory transfer in Embedded C - Step-by-Step Execution

Concept Flow - Peripheral-to-memory transfer

Peripheral has data ready

↓

Check if DMA enabled?

No→Wait or CPU handles

Yes↓

DMA controller reads data from peripheral

↓

DMA controller writes data to memory

↓

Update transfer count

↓

Check if transfer complete?

No→Repeat DMA read/write

Yes↓

DMA signals transfer complete interrupt

↓

CPU processes data in memory

This flow shows how data moves from a peripheral device to memory using DMA, reducing CPU load.

Execution Sample

Embedded C

volatile uint8_t *PERIPH_DATA = (uint8_t*)0x4000;
uint8_t buffer[4];
for(int i=0; i<4; i++) {
  buffer[i] = *PERIPH_DATA;
}

This code reads 4 bytes from a peripheral register into a memory buffer using CPU polling.

Execution Table

Step	i	Action	PERIPH_DATA Read	buffer[i] Value
1	0	Read from peripheral	0x12	0x12
2	1	Read from peripheral	0x34	0x34
3	2	Read from peripheral	0x56	0x56
4	3	Read from peripheral	0x78	0x78
5	4	Exit loop	-	-

💡 i reaches 4, condition i<4 is false, loop ends

Variable Tracker

Variable	Start	After 1	After 2	After 3	After 4	Final
i	0	1	2	3	4	4
buffer	[_,_,_,_]	[0x12,_,_,_]	[0x12,0x34,_,_]	[0x12,0x34,0x56,_]	[0x12,0x34,0x56,0x78]	[0x12,0x34,0x56,0x78]

Key Moments - 3 Insights

Why does the loop stop when i equals 4?

Because the loop condition i<4 becomes false at step 5 in the execution_table, so the loop exits.

Is the peripheral data read the same each time?

No, each read at steps 1 to 4 shows different values (0x12, 0x34, 0x56, 0x78) as shown in the execution_table.

Why do we use a buffer array here?

The buffer stores the data read from the peripheral so the CPU can use it later without reading the peripheral again.

Visual Quiz - 3 Questions

Look at the execution_table, what is the value of buffer[2] after step 3?

A 0x34

B 0x56

C 0x78

D 0x12

💡 Hint

Check the 'buffer[i] Value' column at step 3 where i=2.

At which step does the loop condition become false and exit?

A Step 5

B Step 4

C Step 3

D Step 2

💡 Hint

Look at the 'Action' column where it says 'Exit loop'.

If the buffer size was increased to 5, how would the variable 'i' change in variable_tracker?

A It would start at 1

B It would stay at 4

C It would go up to 5 instead of 4

D It would decrease

💡 Hint

The loop runs while i < buffer size, so increasing size increases max i.

Concept Snapshot

Peripheral-to-memory transfer:
- Data moves from peripheral to memory buffer
- CPU can read peripheral directly or use DMA
- Loop reads data step-by-step
- Loop ends when count reached
- Buffer stores data for CPU use

Full Transcript

This example shows how data is transferred from a peripheral device to memory using a simple loop in embedded C. The peripheral data register is read four times, each time storing the value into a buffer array. The loop variable i starts at 0 and increments until it reaches 4, at which point the loop stops. Each step reads a different byte from the peripheral, shown in the execution table. The buffer accumulates these bytes for later CPU processing. This method uses CPU polling, but in real embedded systems, DMA can automate this transfer to reduce CPU load.

Practice

1. What is the main purpose of peripheral-to-memory transfer in embedded systems?

easy

A. To execute arithmetic operations on peripheral data

B. To send data from memory back to the peripheral device

C. To move data directly from a peripheral device to memory without CPU intervention

D. To reset the peripheral device after data transfer

Solution

1. Step 1: Understand peripheral-to-memory transfer

   This transfer moves data directly from a peripheral device to memory, bypassing the CPU to improve efficiency.

2. Step 2: Identify the main purpose

   The main goal is to reduce CPU load by letting hardware handle data movement.

3. Final Answer:

   To move data directly from a peripheral device to memory without CPU intervention -> Option C

4. Quick Check:

   Peripheral-to-memory transfer = direct data move without CPU [OK]

Hint: Peripheral-to-memory means data moves without CPU help [OK]

Common Mistakes:

• Confusing peripheral-to-memory with memory-to-peripheral transfer
• Thinking CPU processes data during transfer
• Assuming transfer resets the device

2. Which of the following is the correct way to enable DMA for peripheral-to-memory transfer in embedded C?

easy

A. DMA_Channel->CCR = DMA_CCR_EN << 1;

B. DMA_Channel->CCR |= DMA_CCR_EN;

C. DMA_Channel->CCR &= ~DMA_CCR_EN;

D. DMA_Channel->CCR = 0;

Solution

1. Step 1: Understand DMA enable bit setting

   To enable DMA channel, the enable bit (DMA_CCR_EN) must be set using bitwise OR to preserve other bits.

2. Step 2: Analyze options

   DMA_Channel->CCR |= DMA_CCR_EN; sets the enable bit correctly with |=. DMA_Channel->CCR = 0; clears all bits, disabling DMA. DMA_Channel->CCR &= ~DMA_CCR_EN; clears the enable bit. DMA_Channel->CCR = DMA_CCR_EN << 1; shifts enable bit incorrectly.

3. Final Answer:

   DMA_Channel->CCR |= DMA_CCR_EN; -> Option B

4. Quick Check:

   Enable DMA by setting bit with |= [OK]

Hint: Use |= to set enable bit without clearing others [OK]

Common Mistakes:

• Using = instead of |= clears other bits
• Clearing enable bit instead of setting it
• Shifting bits incorrectly

3. Given the following code snippet, what will be the value of memory_buffer[0] after DMA transfer completes?

uint8_t peripheral_data = 0x55;
uint8_t memory_buffer[1] = {0x00};
// DMA configured to transfer 1 byte from &peripheral_data to memory_buffer
// DMA transfer completes here

medium

A. 0x55

B. 0x00

C. 0xFF

D. Undefined (random value)

Solution

1. Step 1: Understand DMA transfer setup

   DMA is set to transfer 1 byte from peripheral_data (0x55) to memory_buffer.

2. Step 2: Determine memory_buffer[0] after transfer

   After transfer, memory_buffer[0] will hold the value 0x55 copied from peripheral_data.

3. Final Answer:

   0x55 -> Option A

4. Quick Check:

   DMA copies 0x55 to memory_buffer[0] [OK]

Hint: DMA copies source byte to destination buffer [OK]

Common Mistakes:

• Assuming memory_buffer stays unchanged
• Confusing peripheral_data value
• Thinking DMA sets memory to 0xFF

4. Identify the error in this DMA peripheral-to-memory transfer setup code snippet:

DMA_Channel->CPAR = (uint32_t)&memory_buffer;
DMA_Channel->CMAR = (uint32_t)&peripheral_data;
DMA_Channel->CNDTR = 4;
DMA_Channel->CCR &= ~DMA_CCR_EN;
DMA_Channel->CCR |= DMA_CCR_EN;

medium

A. The DMA channel is enabled before setting transfer length

B. The DMA channel is enabled without disabling first

C. The transfer length (CNDTR) is set after enabling DMA

D. The peripheral address and memory address are swapped

Solution

1. Step 1: Recall DMA register roles

   CPAR holds peripheral (source) address, CMAR holds memory (destination) address for peripheral-to-memory transfer.

2. Step 2: Check the code assignments

   The code sets CPAR = &memory_buffer (should be peripheral), CMAR = &peripheral_data (should be memory). Addresses are swapped.

3. Final Answer:

   The peripheral address and memory address are swapped -> Option D

4. Quick Check:

   CPAR=peripheral, CMAR=memory [OK]

Hint: Peripheral address = CPAR, Memory address = CMAR [OK]

Common Mistakes:

• Swapping peripheral and memory addresses
• Enabling DMA before setting parameters
• Not disabling DMA before re-enabling

5. You want to transfer 8 bytes from a UART peripheral data register to a memory buffer using DMA. Which sequence correctly sets up the DMA for peripheral-to-memory transfer?

hard

A. Set DMA peripheral address to UART data register; set memory address to buffer; set transfer length to 8; enable DMA channel

B. Set DMA memory address to UART data register; set peripheral address to buffer; set transfer length to 8; enable DMA channel

C. Set DMA peripheral address to buffer; set memory address to UART data register; set transfer length to 8; enable DMA channel

D. Set DMA transfer length to 8; enable DMA channel; set peripheral and memory addresses afterwards

Solution

1. Step 1: Identify source and destination

   Source is UART data register (peripheral), destination is memory buffer.

2. Step 2: Set DMA registers correctly

   Peripheral address register (CPAR) must point to UART data register, memory address register (CMAR) to buffer, transfer length to 8 bytes, then enable DMA channel.

3. Final Answer:

   Set DMA peripheral address to UART data register; set memory address to buffer; set transfer length to 8; enable DMA channel -> Option A

4. Quick Check:

   Peripheral = source, Memory = destination, length set before enable [OK]

Hint: Peripheral address = source, memory address = destination [OK]

Common Mistakes:

• Swapping peripheral and memory addresses
• Enabling DMA before setting addresses and length
• Setting transfer length after enabling DMA