Peripheral-to-memory transfer in Embedded C - Time & Space Complexity

Time Complexity: Peripheral-to-memory transfer

O(n)

Understanding Time Complexity

We want to understand how the time to transfer data from a peripheral to memory changes as the amount of data grows.

How does the program's running time increase when we transfer more data?

Scenario Under Consideration

Analyze the time complexity of the following code snippet.

void peripheral_to_memory_transfer(uint8_t* peripheral, uint8_t* memory, int size) {
    for (int i = 0; i < size; i++) {
        memory[i] = peripheral[i];
    }
}
    

This code copies data byte-by-byte from a peripheral buffer to a memory buffer for a given size.

Identify Repeating Operations

Identify the loops, recursion, array traversals that repeat.

• Primary operation: Copying one byte from peripheral to memory inside the loop.
• How many times: The loop runs exactly size times, once per byte.

How Execution Grows With Input

As the number of bytes to transfer grows, the total operations grow in the same way.

Input Size (n)	Approx. Operations
10	10 copies
100	100 copies
1000	1000 copies

Pattern observation: Doubling the data size doubles the number of copy operations.

Final Time Complexity

Time Complexity: O(n)

This means the time to transfer grows directly in proportion to the amount of data.

Common Mistake

[X] Wrong: "The transfer time stays the same no matter how much data we copy."

[OK] Correct: Each byte must be copied one by one, so more data means more time.

Interview Connect

Understanding how data transfer time grows helps you explain performance in embedded systems clearly and confidently.

Self-Check

"What if we used DMA (Direct Memory Access) to transfer data instead of a loop? How would the time complexity change?"

Practice

1. What is the main purpose of peripheral-to-memory transfer in embedded systems?

easy

A. To execute arithmetic operations on peripheral data

B. To send data from memory back to the peripheral device

C. To move data directly from a peripheral device to memory without CPU intervention

D. To reset the peripheral device after data transfer

Solution

1. Step 1: Understand peripheral-to-memory transfer

   This transfer moves data directly from a peripheral device to memory, bypassing the CPU to improve efficiency.

2. Step 2: Identify the main purpose

   The main goal is to reduce CPU load by letting hardware handle data movement.

3. Final Answer:

   To move data directly from a peripheral device to memory without CPU intervention -> Option C

4. Quick Check:

   Peripheral-to-memory transfer = direct data move without CPU [OK]

Hint: Peripheral-to-memory means data moves without CPU help [OK]

Common Mistakes:

• Confusing peripheral-to-memory with memory-to-peripheral transfer
• Thinking CPU processes data during transfer
• Assuming transfer resets the device

2. Which of the following is the correct way to enable DMA for peripheral-to-memory transfer in embedded C?

easy

A. DMA_Channel->CCR = DMA_CCR_EN << 1;

B. DMA_Channel->CCR |= DMA_CCR_EN;

C. DMA_Channel->CCR &= ~DMA_CCR_EN;

D. DMA_Channel->CCR = 0;

Solution

1. Step 1: Understand DMA enable bit setting

   To enable DMA channel, the enable bit (DMA_CCR_EN) must be set using bitwise OR to preserve other bits.

2. Step 2: Analyze options

   DMA_Channel->CCR |= DMA_CCR_EN; sets the enable bit correctly with |=. DMA_Channel->CCR = 0; clears all bits, disabling DMA. DMA_Channel->CCR &= ~DMA_CCR_EN; clears the enable bit. DMA_Channel->CCR = DMA_CCR_EN << 1; shifts enable bit incorrectly.

3. Final Answer:

   DMA_Channel->CCR |= DMA_CCR_EN; -> Option B

4. Quick Check:

   Enable DMA by setting bit with |= [OK]

Hint: Use |= to set enable bit without clearing others [OK]

Common Mistakes:

• Using = instead of |= clears other bits
• Clearing enable bit instead of setting it
• Shifting bits incorrectly

3. Given the following code snippet, what will be the value of memory_buffer[0] after DMA transfer completes?

uint8_t peripheral_data = 0x55;
uint8_t memory_buffer[1] = {0x00};
// DMA configured to transfer 1 byte from &peripheral_data to memory_buffer
// DMA transfer completes here

medium

A. 0x55

B. 0x00

C. 0xFF

D. Undefined (random value)

Solution

1. Step 1: Understand DMA transfer setup

   DMA is set to transfer 1 byte from peripheral_data (0x55) to memory_buffer.

2. Step 2: Determine memory_buffer[0] after transfer

   After transfer, memory_buffer[0] will hold the value 0x55 copied from peripheral_data.

3. Final Answer:

   0x55 -> Option A

4. Quick Check:

   DMA copies 0x55 to memory_buffer[0] [OK]

Hint: DMA copies source byte to destination buffer [OK]

Common Mistakes:

• Assuming memory_buffer stays unchanged
• Confusing peripheral_data value
• Thinking DMA sets memory to 0xFF

4. Identify the error in this DMA peripheral-to-memory transfer setup code snippet:

DMA_Channel->CPAR = (uint32_t)&memory_buffer;
DMA_Channel->CMAR = (uint32_t)&peripheral_data;
DMA_Channel->CNDTR = 4;
DMA_Channel->CCR &= ~DMA_CCR_EN;
DMA_Channel->CCR |= DMA_CCR_EN;

medium

A. The DMA channel is enabled before setting transfer length

B. The DMA channel is enabled without disabling first

C. The transfer length (CNDTR) is set after enabling DMA

D. The peripheral address and memory address are swapped

Solution

1. Step 1: Recall DMA register roles

   CPAR holds peripheral (source) address, CMAR holds memory (destination) address for peripheral-to-memory transfer.

2. Step 2: Check the code assignments

   The code sets CPAR = &memory_buffer (should be peripheral), CMAR = &peripheral_data (should be memory). Addresses are swapped.

3. Final Answer:

   The peripheral address and memory address are swapped -> Option D

4. Quick Check:

   CPAR=peripheral, CMAR=memory [OK]

Hint: Peripheral address = CPAR, Memory address = CMAR [OK]

Common Mistakes:

• Swapping peripheral and memory addresses
• Enabling DMA before setting parameters
• Not disabling DMA before re-enabling

5. You want to transfer 8 bytes from a UART peripheral data register to a memory buffer using DMA. Which sequence correctly sets up the DMA for peripheral-to-memory transfer?

hard

A. Set DMA peripheral address to UART data register; set memory address to buffer; set transfer length to 8; enable DMA channel

B. Set DMA memory address to UART data register; set peripheral address to buffer; set transfer length to 8; enable DMA channel

C. Set DMA peripheral address to buffer; set memory address to UART data register; set transfer length to 8; enable DMA channel

D. Set DMA transfer length to 8; enable DMA channel; set peripheral and memory addresses afterwards

Solution

1. Step 1: Identify source and destination

   Source is UART data register (peripheral), destination is memory buffer.

2. Step 2: Set DMA registers correctly

   Peripheral address register (CPAR) must point to UART data register, memory address register (CMAR) to buffer, transfer length to 8 bytes, then enable DMA channel.

3. Final Answer:

   Set DMA peripheral address to UART data register; set memory address to buffer; set transfer length to 8; enable DMA channel -> Option A

4. Quick Check:

   Peripheral = source, Memory = destination, length set before enable [OK]

Hint: Peripheral address = source, memory address = destination [OK]

Common Mistakes:

• Swapping peripheral and memory addresses
• Enabling DMA before setting addresses and length
• Setting transfer length after enabling DMA