Memory-mapped I/O concept in ARM Architecture - Step-by-Step Execution

Concept Flow - Memory-mapped I/O concept

CPU wants to communicate

↓

CPU sends address

↓

Address decoded

↓

Memory

↓

Read/Write

↓

Data returned or sent

↓

CPU receives data

The CPU sends an address; if it matches memory, data is read/written from memory; if it matches an I/O device address, data is read/written to that device using the same bus.

Execution Sample

ARM Architecture

CPU writes value 0x55 to address 0x40000000
CPU reads from address 0x40000000
CPU writes value 0xAA to address 0x20000000
CPU reads from address 0x20000000

This shows CPU accessing memory and I/O device addresses using the same address bus.

Analysis Table

Step	Address Sent	Address Type	Action	Data Written/Read	Result
1	0x40000000	Memory	Write	0x55	Value 0x55 stored in memory at 0x40000000
2	0x40000000	Memory	Read	-	Value 0x55 read from memory
3	0x20000000	I/O Device	Write	0xAA	Value 0xAA sent to I/O device register
4	0x20000000	I/O Device	Read	-	Value 0xAA read from I/O device register
5	-	-	-	-	Execution ends after these operations

💡 All planned memory and I/O accesses completed

State Tracker

Variable	Start	After Step 1	After Step 2	After Step 3	After Step 4	Final
Memory[0x40000000]	undefined	0x55	0x55	0x55	0x55	0x55
IO_Device_Register[0x20000000]	undefined	undefined	undefined	0xAA	0xAA	0xAA

Key Insights - 2 Insights

Why does the CPU use the same address bus for both memory and I/O devices?

Because in memory-mapped I/O, I/O devices are assigned specific memory addresses, so the CPU accesses them just like normal memory, as shown in steps 3 and 4 of the execution_table.

How does the system know if an address is for memory or an I/O device?

The address decoder checks the address sent by the CPU and directs the operation to memory or the I/O device accordingly, as shown in the concept_flow branching after 'Address decoded'.

Visual Quiz - 3 Questions

Look at the execution_table, what data is written to memory at step 1?

A 0xAA

B 0x55

C value_read

D undefined

💡 Hint

Check the 'Data Written/Read' column at step 1 in execution_table

At which step does the CPU write data to an I/O device?

A Step 4

B Step 2

C Step 3

D Step 1

💡 Hint

Look for 'I/O Device' and 'Write' in the 'Address Type' and 'Action' columns in execution_table

If the address decoder failed to distinguish addresses, what would happen at step 3?

A Data would be written to memory instead of I/O device

B Data would be lost

C CPU would halt

D Data would be written to both memory and I/O device

💡 Hint

Refer to concept_flow where address decoding directs the action to memory or I/O device

Concept Snapshot

Memory-mapped I/O uses the same address and data buses for memory and I/O devices.
CPU sends an address; address decoder routes it to memory or I/O device.
CPU reads/writes data using normal memory instructions.
I/O devices appear as special memory addresses.
Simplifies CPU design by unifying access methods.

Full Transcript

Memory-mapped I/O means the CPU uses the same address lines to access both memory and input/output devices. When the CPU sends an address, the system checks if it belongs to memory or an I/O device. If it is memory, the CPU reads or writes data there. If it is an I/O device, the CPU reads or writes data to that device's registers. This way, the CPU treats I/O devices like memory locations. For example, writing 0x55 to address 0x40000000 stores it in memory, while writing 0xAA to 0x20000000 sends it to an I/O device. This method simplifies communication and hardware design by using one bus system for both memory and devices.

Practice

1. What is the main idea behind memory-mapped I/O in ARM architecture?

easy

A. Using separate instructions for input and output

B. Storing program code in external memory

C. Running I/O operations only through interrupts

D. Using special memory addresses to communicate with hardware devices

Solution

1. Step 1: Understand memory-mapped I/O concept

   Memory-mapped I/O means hardware devices are accessed by reading/writing to specific memory addresses.

2. Step 2: Compare options with concept

   Only Using special memory addresses to communicate with hardware devices describes using special memory addresses to communicate with devices, matching the concept.

3. Final Answer:

   Using special memory addresses to communicate with hardware devices -> Option D

4. Quick Check:

   Memory-mapped I/O = special memory addresses [OK]

Hint: Memory-mapped I/O uses memory addresses for devices [OK]

Common Mistakes:

• Confusing memory-mapped I/O with separate I/O instructions
• Thinking I/O uses interrupts only
• Assuming memory-mapped I/O stores program code

2. Which of the following is the correct way to access a device register at address 0x40000000 in ARM assembly using memory-mapped I/O?

easy

A. MOV R0, #0x40000000

B. LDR R0, =0x40000000

C. STR R0, 0x40000000

D. ADD R0, R0, #0x40000000

Solution

1. Step 1: Understand ARM assembly syntax for loading address

   To access a memory-mapped device, load the device address into a register using LDR R0, =address.

2. Step 2: Analyze options

   LDR R0, =0x40000000 correctly loads the address 0x40000000 into R0. MOV R0, #0x40000000 tries to move an immediate value too large for MOV. STR R0, 0x40000000 stores R0 to the address but does not load it first. ADD R0, R0, #0x40000000 adds the address to R0, which is incorrect for direct access.

3. Final Answer:

   LDR R0, =0x40000000 -> Option B

4. Quick Check:

   Load address with LDR = LDR R0, =0x40000000 [OK]

Hint: Use LDR with =address to load device address [OK]

Common Mistakes:

• Using MOV for large addresses
• Confusing load and store instructions
• Adding address instead of loading it

3. Given this C code snippet accessing a memory-mapped I/O device:

volatile unsigned int *device = (unsigned int *)0x40000000;
*device = 0xFF;

What happens when this code runs?

medium

A. The value 0xFF is stored in normal RAM

B. The program crashes due to invalid pointer

C. The value 0xFF is written to the device register at address 0x40000000

D. Nothing happens because the pointer is not initialized

Solution

1. Step 1: Understand pointer to memory-mapped device

   The pointer device points to address 0x40000000, which is a device register in memory-mapped I/O.

2. Step 2: Analyze the write operation

   The statement *device = 0xFF; writes the value 0xFF directly to that device register, controlling the hardware.

3. Final Answer:

   The value 0xFF is written to the device register at address 0x40000000 -> Option C

4. Quick Check:

   Pointer write to device address = value written [OK]

Hint: Pointer to device address writes value to hardware [OK]

Common Mistakes:

• Assuming pointer points to normal RAM
• Thinking pointer is uninitialized
• Confusing device address with invalid memory

4. Identify the error in this ARM assembly snippet intended to read from a memory-mapped device at 0x40000000:

LDR R1, 0x40000000
STR R1, R0

medium

A. LDR instruction syntax is incorrect for loading address

B. STR instruction should be LDR to read data

C. Register R0 is not initialized

D. No error, code is correct

Solution

1. Step 1: Check LDR syntax for loading from address

   LDR with immediate value like LDR R1, 0x40000000 is invalid; it should use LDR R1, [address] or LDR R1, =address.

2. Step 2: Analyze STR instruction

   STR stores R1 to address in R0, which may be valid but the main error is the LDR syntax.

3. Final Answer:

   LDR instruction syntax is incorrect for loading address -> Option A

4. Quick Check:

   LDR syntax error = LDR instruction syntax is incorrect for loading address [OK]

Hint: LDR needs brackets or = for address load [OK]

Common Mistakes:

• Using immediate value directly in LDR
• Confusing STR and LDR roles
• Ignoring register initialization

5. You want to toggle a hardware LED connected via memory-mapped I/O at address 0x40000010. The LED turns on when bit 0 is set. Which C code snippet correctly toggles the LED without affecting other bits?

hard

A. *(volatile unsigned int *)0x40000010 ^= 0x1;

B. *(volatile unsigned int *)0x40000010 = 0x1;

C. *(volatile unsigned int *)0x40000010 |= 0x1;

D. *(volatile unsigned int *)0x40000010 &= ~0x1;

Solution

1. Step 1: Understand toggling bit 0 without changing others

   Toggling means flipping bit 0: if 0 then 1, if 1 then 0, without changing other bits.

2. Step 2: Analyze each option

   *(volatile unsigned int *)0x40000010 ^= 0x1; uses XOR with 0x1, which flips bit 0 correctly. *(volatile unsigned int *)0x40000010 = 0x1; sets bit 0 always to 1 (turns LED on only). *(volatile unsigned int *)0x40000010 |= 0x1; sets bit 0 to 1 but does not toggle. *(volatile unsigned int *)0x40000010 &= ~0x1; clears bit 0 always (turns LED off).

3. Final Answer:

   *(volatile unsigned int *)0x40000010 ^= 0x1; -> Option A

4. Quick Check:

   XOR with 1 toggles bit = *(volatile unsigned int *)0x40000010 ^= 0x1; [OK]

Hint: Use XOR with 1 to toggle a bit safely [OK]

Common Mistakes:

• Using OR instead of XOR for toggle
• Setting bit instead of toggling
• Clearing bit instead of toggling