Bit manipulation in ARM in ARM Architecture - Step-by-Step Execution

Concept Flow - Bit manipulation in ARM

Load Register with Value

↓

Select Bit Operation

↓

Apply Bit Mask or Shift

↓

Update Register with Result

↓

Use Result in Program or Store

This flow shows how ARM CPU manipulates bits by loading a value, applying bit operations like AND, OR, XOR, shifts, then storing the result.

Execution Sample

ARM Architecture

MOV R0, #0x55       ; Load R0 with 0x55 (01010101)
AND R1, R0, #0x0F    ; R1 = R0 AND 0x0F (mask lower 4 bits)
LSL R2, R1, #1       ; R2 = R1 shifted left by 1 bit
ORR R3, R2, #0x80    ; R3 = R2 OR 0x80 (set highest bit)

This code loads a value, masks bits, shifts bits left, then sets a high bit using OR.

Analysis Table

Step	Instruction	Register Values	Operation	Result
1	MOV R0, #0x55	R0=0x00 → R0=0x55	Load immediate 0x55 into R0	R0=0x55 (binary 01010101)
2	AND R1, R0, #0x0F	R0=0x55, R1=0x00	Bitwise AND R0 with 0x0F	R1=0x05 (binary 00000101)
3	LSL R2, R1, #1	R1=0x05, R2=0x00	Logical shift left R1 by 1	R2=0x0A (binary 00001010)
4	ORR R3, R2, #0x80	R2=0x0A, R3=0x00	Bitwise OR R2 with 0x80	R3=0x8A (binary 10001010)
5	End	Final: R0=0x55, R1=0x05, R2=0x0A, R3=0x8A	No more instructions	Execution complete

💡 All instructions executed, final register values shown

State Tracker

Register	Start	After Step 1	After Step 2	After Step 3	After Step 4	Final
R0	0x00	0x55	0x55	0x55	0x55	0x55
R1	0x00	0x00	0x05	0x05	0x05	0x05
R2	0x00	0x00	0x00	0x0A	0x0A	0x0A
R3	0x00	0x00	0x00	0x00	0x8A	0x8A

Key Insights - 3 Insights

Why does AND with 0x0F keep only the lower 4 bits?

Because 0x0F in binary is 00001111, ANDing with it clears all bits except the lowest 4, as shown in step 2 of the execution_table.

What happens when we shift bits left by 1 in LSL?

Each bit moves one position to the left, doubling the value if no bits are lost. Step 3 shows 0x05 (00000101) becomes 0x0A (00001010).

How does ORR set a specific bit without changing others?

ORR with 0x80 (10000000) sets the highest bit to 1 while leaving other bits unchanged, as seen in step 4 where R3 becomes 0x8A.

Visual Quiz - 3 Questions

Look at the execution_table step 2. What is the binary value of R1 after the AND operation?

A 00000101

B 00001111

C 01010101

D 00001010

💡 Hint

Check the 'Result' column in step 2 of execution_table.

At which step does the register R2 get its value updated?

A Step 1

B Step 2

C Step 3

D Step 4

💡 Hint

Look at the 'Register Values' and 'Result' columns for R2 in execution_table.

If the ORR instruction used 0x40 instead of 0x80, what would be the new value of R3 in step 4?

A 0x0A

B 0x4A

C 0x8A

D 0xCA

💡 Hint

ORR sets bits where 1s are in the mask; 0x40 is binary 01000000.

Concept Snapshot

Bit manipulation in ARM uses instructions like AND, ORR, LSL to change bits.
AND masks bits, keeping only selected ones.
LSL shifts bits left, multiplying by 2 per shift.
ORR sets bits without changing others.
These operations update registers directly for efficient control.

Full Transcript

This lesson shows how ARM processors manipulate bits using instructions like MOV, AND, LSL, and ORR. We start by loading a value into a register, then mask bits with AND to keep only certain bits. Next, we shift bits left with LSL, moving each bit one place higher. Finally, we set specific bits using ORR, which turns on bits without changing others. The execution table traces each step with register values and results, helping visualize how bits change. Key moments explain why masking keeps lower bits, how shifting moves bits, and how ORR sets bits safely. The quiz tests understanding of these steps and bit values. This knowledge helps control hardware and optimize programs at the bit level in ARM architecture.

Practice

1. Which ARM instruction is used to set specific bits to 1 without changing other bits?

easy

A. BIC

B. ORR

C. EOR

D. LSR

Solution

1. Step 1: Understand ORR instruction

   ORR performs a bitwise OR, setting bits to 1 where either operand has 1.

2. Step 2: Compare with other instructions

   BIC clears bits, EOR toggles bits, LSR shifts bits right. Only ORR sets bits without clearing others.

3. Final Answer:

   ORR -> Option B

4. Quick Check:

   Set bits = ORR [OK]

Hint: ORR sets bits; BIC clears bits; remember ORR for setting [OK]

Common Mistakes:

• Confusing BIC with ORR
• Thinking EOR sets bits
• Mixing shift instructions with bit setting

2. Which of the following is the correct syntax to clear bits using BIC in ARM assembly?

easy

A. BIC R0, R1, R2

B. BIC R0, R1, #R2

C. BIC R0, #R1, R2

D. BIC R0, R1, LSR #1

Solution

1. Step 1: Review BIC syntax

   BIC syntax is BIC destination, source, operand2 (register or immediate). BIC R0, R1, R2 matches this format.

2. Step 2: Analyze other options

   Options using # before register names are invalid; the option attempting a shift lacks the required register operand, making it invalid syntax.

3. Final Answer:

   BIC R0, R1, R2 -> Option A

4. Quick Check:

   BIC syntax = BIC Rd, Rn, Operand2 [OK]

Hint: BIC clears bits: BIC Rd, Rn, Operand2 [OK]

Common Mistakes:

• Using # before register names
• Confusing immediate and register operands
• Adding unnecessary shifts in basic syntax

3. Given the ARM instruction EOR R0, R1, #0xFF and R1 contains 0x0F0F, what will be the value in R0 after execution?

medium

A. 0xF0F0

B. 0x0F00

C. 0xF0F0FF

D. 0x0FF0

Solution

1. Step 1: Understand EOR operation

   EOR performs bitwise exclusive OR between R1 and immediate 0xFF (which is 255 decimal).

2. Step 2: Calculate bitwise EOR

   R1 = 0x0F0F (binary 0000111100001111), immediate 0xFF affects only lower 8 bits (0000000011111111). XOR lower 8 bits: 00001111 XOR 11111111 = 11110000 (0xF0). Upper bits remain 0x0F. So result is 0x0F (upper) and 0xF0 (lower) combined = 0xF0F0.

3. Final Answer:

   0xF0F0 -> Option A

4. Quick Check:

   EOR 0x0F0F ^ 0x00FF = 0xF0F0 [OK]

Hint: EOR toggles bits; XOR lower byte 0x0F with 0xFF = 0xF0 [OK]

Common Mistakes:

• Applying immediate to full 16 bits
• Confusing OR with XOR
• Ignoring bitwise operation effects

4. Identify the error in this ARM assembly snippet intended to clear bit 3 of R2:
BIC R2, R2, #3

medium

A. BIC cannot use immediate values

B. Syntax error: missing comma after R2

C. Immediate value #3 clears bits 0 and 1, not bit 3

D. Should use ORR instead of BIC

Solution

1. Step 1: Understand BIC with immediate

   BIC clears bits set in the immediate value. #3 in binary is 00000011, which clears bits 0 and 1.

2. Step 2: Check which bit to clear

   Bit 3 corresponds to binary 00001000 (decimal 8). Using #3 clears wrong bits.

3. Final Answer:

   Immediate value #3 clears bits 0 and 1, not bit 3 -> Option C

4. Quick Check:

   Clear bit 3 needs #8, not #3 [OK]

Hint: Immediate #3 clears bits 0 and 1, use #8 for bit 3 [OK]

Common Mistakes:

• Using wrong immediate value for bit position
• Thinking BIC can't use immediate
• Confusing ORR and BIC roles

5. You want to toggle bits 0 and 2 of register R3 without affecting other bits. Which ARM instruction and operand should you use?

hard

A. AND R3, R3, #0x05

B. ORR R3, R3, #0x05

C. BIC R3, R3, #0x05

D. EOR R3, R3, #0x05

Solution

1. Step 1: Identify bits to toggle

   Bits 0 and 2 correspond to binary 00000101 (hex 0x05).

2. Step 2: Choose instruction for toggling bits

   EOR toggles bits where mask bits are 1. ORR sets bits, BIC clears bits, AND masks bits.

3. Step 3: Apply EOR with mask 0x05

   EOR R3, R3, #0x05 flips bits 0 and 2, leaving others unchanged.

4. Final Answer:

   EOR R3, R3, #0x05 -> Option D

5. Quick Check:

   Toggle bits = EOR with mask [OK]

Hint: Toggle bits with EOR and mask of bits to flip [OK]

Common Mistakes:

• Using ORR or AND instead of EOR for toggling
• Wrong mask value for bits 0 and 2
• Confusing clearing with toggling