ARM memory map overview in ARM Architecture - Time & Space Complexity
We want to understand how the time to access memory changes as the size of the memory area grows in an ARM system.
How does the ARM memory map affect the speed of accessing different memory regions?
Analyze the time complexity of accessing memory in different regions defined by the ARM memory map.
loop_start:
LDR R0, [R1] ; Load data from address in R1
ADD R1, R1, #4 ; Move to next memory address
CMP R1, R2 ; Compare current address with end address
BNE loop_start ; Repeat if not reached end
This code loads data sequentially from memory addresses between R1 and R2.
We look for repeated actions that affect time.
- Primary operation: Loading data from memory (LDR instruction).
- How many times: Once for each memory address between start and end (R1 to R2).
As the number of memory addresses to read increases, the total time grows proportionally.
| Input Size (n) | Approx. Operations |
|---|---|
| 10 | 10 memory loads |
| 100 | 100 memory loads |
| 1000 | 1000 memory loads |
Pattern observation: The time grows linearly as the number of memory addresses increases.
Time Complexity: O(n)
This means the time to access memory grows directly in proportion to how many addresses you read.
[X] Wrong: "Accessing any memory address takes the same fixed time regardless of size or location."
[OK] Correct: Different memory regions in the ARM map can have different speeds, so time per access may vary depending on where the address lies.
Understanding how memory access time grows helps you reason about system performance and write efficient code that respects hardware limits.
"What if the memory accesses were to a cache instead of main memory? How would the time complexity change?"
Practice
Solution
Step 1: Understand the purpose of ROM
ROM is used to store code and data that should not be changed during program execution, such as firmware or boot code.Step 2: Compare with other memory types
RAM is for temporary data storage, peripherals control hardware devices, and system control registers manage system settings.Final Answer:
ROM (Read-Only Memory) -> Option AQuick Check:
Non-changeable program code = ROM [OK]
- Confusing RAM with ROM
- Thinking peripherals store program code
- Assuming system control holds program instructions
Solution
Step 1: Recall standard ARM memory map addresses
RAM typically starts at address 0x20000000 in many ARM Cortex-M microcontrollers.Step 2: Identify other addresses
0x00000000 is usually ROM start, 0x40000000 is peripheral base, and 0xE0000000 is system control space.Final Answer:
0x20000000 -> Option CQuick Check:
RAM start address = 0x20000000 [OK]
- Mixing ROM and RAM start addresses
- Confusing peripheral and system control addresses
- Using decimal instead of hex notation
Solution
Step 1: Analyze the address ranges
RAM ends at 0x3FFFFFFF, so any address below or equal to this is in RAM.Step 2: Check the given address
0x3FFF0000 is less than 0x3FFFFFFF, so it lies within RAM.Final Answer:
Accesses RAM memory -> Option BQuick Check:
Address < RAM end = RAM access [OK]
- Assuming peripherals start at 0x3FFF0000
- Confusing RAM end with peripheral start
- Thinking address causes fault without checking range
Solution
Step 1: Verify system control address range
System control registers usually start at 0xE0000000 and cover a specific range including 0xE0001000.Step 2: Consider causes of fault
If access faults, it often means memory map settings (like MPU or MMU) block access.Final Answer:
The memory map is incorrectly configured -> Option AQuick Check:
Fault at valid address = memory map config error [OK]
- Assuming address is outside system control
- Thinking write protection causes fault always
- Confusing peripheral and system control regions
Solution
Step 1: Calculate highest RAM address
Start address + size - 1 = 0x20000000 + 0x1FFF0000 - 1 = 0x3FFF0000 - 1 = 0x3FFEFFFF (correct calculation: 0x20000000 + 0x1FFF0000 = 0x3FFF0000 exactly, so highest address is 0x3FFF0000 - 1 = 0x3FFEFFFF)Step 2: Check for overlap with peripherals
Peripherals start at 0x40000000, so RAM highest address must be less than this. 0x3FFEFFFF is less than 0x40000000, so no overlap.Final Answer:
0x3FFEFFFF -> Option DQuick Check:
RAM end < peripheral start = 0x3FFEFFFF [OK]
- Adding size without subtracting 1
- Confusing RAM end with peripheral start
- Using decimal instead of hex for addresses
Ready to prove it?
Pass the test and this pattern moves unknown
