Addressing modes (immediate, register, offset) in ARM Architecture - Step-by-Step Execution

Concept Flow - Addressing modes (immediate, register, offset)

Start Instruction

↓

Decode Addressing Mode

↓

Immediate

↓

Use Value

↓

Execute Instruction

↓

End

The CPU reads the instruction, identifies the addressing mode (immediate, register, or offset), fetches or calculates the operand accordingly, then executes the instruction.

Execution Sample

ARM Architecture

LDR R1, [R2, #4]
ADD R3, R1, #10
MOV R4, #5

Load value from memory at address R2+4 into R1, add 10 to R1 and store in R3, move immediate 5 into R4.

Analysis Table

Step	Instruction	Addressing Mode	Operand Fetch/Calculation	Result/Action
1	LDR R1, [R2, #4]	Offset	Calculate address = R2 + 4	Load value from memory at calculated address into R1
2	ADD R3, R1, #10	Immediate	Use immediate value 10	Add 10 to R1 and store in R3
3	MOV R4, #5	Immediate	Use immediate value 5	Move 5 directly into R4
4	End	-	-	All instructions executed

💡 All instructions processed, program moves to next sequence

State Tracker

Variable	Start	After Step 1	After Step 2	After Step 3
R1	undefined	Memory[R2+4]	Memory[R2+4] + 10	Memory[R2+4] + 10
R3	undefined	undefined	Memory[R2+4] + 10	Memory[R2+4] + 10
R4	undefined	undefined	undefined	5
R2	1000	1000	1000	1000

Key Insights - 3 Insights

Why does the LDR instruction use an offset addressing mode instead of immediate?

Because LDR loads data from memory, it needs to calculate the memory address by adding the offset to the base register (R2). Immediate mode provides a value directly, not an address.

How does the CPU know when to use the immediate value directly?

The instruction encoding specifies the addressing mode. For example, MOV and ADD with # indicate immediate mode, so the CPU uses the value directly as operand.

What happens if the offset is zero in offset addressing?

The address used is just the base register value. The CPU calculates address = base + 0, effectively using the base register's address directly.

Visual Quiz - 3 Questions

Look at the execution table, what is the addressing mode used in step 2?

A Register

B Immediate

C Offset

D Indirect

💡 Hint

Check the 'Addressing Mode' column in row for step 2 in the execution_table.

At which step does the CPU calculate a memory address using a base register and offset?

A Step 1

B Step 2

C Step 3

D Step 4

💡 Hint

Look at the 'Operand Fetch/Calculation' column for address calculation in the execution_table.

If the immediate value in step 3 changed from 5 to 8, what would change in the variable_tracker?

A R1 would be 8 after step 3

B R3 would be 8 after step 3

C R4 would be 8 after step 3

D R2 would be 8 after step 3

💡 Hint

Check the value of R4 in the variable_tracker after step 3.

Concept Snapshot

Addressing modes tell the CPU how to find operands.
Immediate mode uses the value directly in the instruction.
Register mode uses a value stored in a CPU register.
Offset mode calculates an address by adding a base register and a number.
Instructions specify which mode to use.
CPU fetches or calculates operand accordingly before execution.

Full Transcript

This visual execution trace shows how ARM CPU instructions use different addressing modes: immediate, register, and offset. The CPU starts by decoding the instruction's addressing mode. For immediate mode, it uses the value directly from the instruction. For register mode, it uses the value stored in a register. For offset mode, it calculates a memory address by adding an offset to a base register, then fetches the value from memory. The example instructions load a value from memory using offset addressing, add an immediate value, and move an immediate value into a register. The execution table tracks each step, showing how operands are fetched or calculated and how registers change. Key moments clarify common confusions about when and why each addressing mode is used. The quiz tests understanding by referencing the execution steps and variable changes. The snapshot summarizes the key points for quick review.

Practice

1. Which addressing mode uses a fixed number directly inside the instruction to provide data?

easy

A. Immediate addressing mode

B. Register addressing mode

C. Offset addressing mode

D. Indirect addressing mode

Solution

1. Step 1: Understand immediate addressing mode

   Immediate mode means the instruction contains the actual number (constant) to use.

2. Step 2: Compare with other modes

   Register mode uses CPU registers, offset mode calculates address by adding offset to a register, indirect mode uses memory address stored in a register.

3. Final Answer:

   Immediate addressing mode -> Option A

4. Quick Check:

   Fixed number inside instruction = Immediate mode [OK]

Hint: Immediate mode has the number right inside the instruction [OK]

Common Mistakes:

• Confusing immediate with register mode
• Thinking offset mode uses fixed numbers directly
• Mixing indirect addressing with immediate

2. Which of the following is the correct syntax for using register addressing mode in ARM assembly to move data from register R1 to R0?

easy

A. MOV R0, [R1]

B. MOV R0, #R1

C. MOV R0, R1

D. MOV [R0], R1

Solution

1. Step 1: Understand register addressing syntax

   Register addressing uses register names directly without # or brackets.

2. Step 2: Analyze options

   MOV R0, R1 uses MOV R0, R1 which copies data from R1 to R0 correctly. MOV R0, #R1 wrongly uses # which means immediate. MOV R0, [R1] uses brackets which means memory access. MOV [R0], R1 tries to move to memory location incorrectly.

3. Final Answer:

   MOV R0, R1 -> Option C

4. Quick Check:

   Register names without # or [] = Register mode [OK]

Hint: Register mode uses register names directly, no # or brackets [OK]

Common Mistakes:

• Using # before register name
• Using brackets [] for register mode
• Confusing immediate and register syntax

3. Given the ARM instruction LDR R2, [R3, #4], what does this instruction do?

medium

A. Loads the immediate value 4 into R2

B. Loads the value from memory address in R3 plus 4 into R2

C. Moves the value from R3 to R2

D. Stores the value of R2 into memory address R3 plus 4

Solution

1. Step 1: Identify addressing mode in LDR instruction

   The syntax [R3, #4] means offset addressing mode: base register R3 plus immediate offset 4.

2. Step 2: Understand LDR operation

   LDR loads data from memory address calculated by R3 + 4 into register R2.

3. Final Answer:

   Loads the value from memory address in R3 plus 4 into R2 -> Option B

4. Quick Check:

   Offset mode loads from (R3 + 4) into R2 [OK]

Hint: Brackets with # offset means load from memory address plus offset [OK]

Common Mistakes:

• Thinking #4 is immediate load into R2
• Confusing load with store instruction
• Ignoring the offset in brackets

4. Identify the error in this ARM instruction using addressing modes: ADD R1, R2, #R3

medium

A. Incorrect use of # before register R3

B. Missing brackets around R3

C. Wrong destination register

D. Immediate value cannot be used with ADD

Solution

1. Step 1: Analyze the use of # in ARM instructions

   The # symbol is used only before immediate (constant) values, not registers.

2. Step 2: Check the instruction syntax

   Here #R3 is invalid because R3 is a register, not an immediate value. Correct syntax is ADD R1, R2, R3 without #.

3. Final Answer:

   Incorrect use of # before register R3 -> Option A

4. Quick Check:

   # only for constants, not registers [OK]

Hint: # is only for numbers, never before register names [OK]

Common Mistakes:

• Using # before register names
• Adding brackets unnecessarily
• Confusing immediate and register operands

5. You want to load a value from memory address calculated by adding 8 to the value in register R4, then add an immediate value 5 to it and store in R0. Which sequence of ARM instructions correctly uses addressing modes?

hard

A. LDR R1, [R4, R5]
ADD R0, R1, #8

B. LDR R0, [R4, #5]
ADD R0, R0, #8

C. LDR R0, [R4]
ADD R0, R0, R5

D. LDR R1, [R4, #8]
ADD R0, R1, #5

Solution

1. Step 1: Load from memory address R4 + 8

   Use offset addressing mode: LDR R1, [R4, #8] loads from address R4 + 8 into R1.

2. Step 2: Add immediate 5 to loaded value

   ADD R0, R1, #5 adds immediate 5 to R1 and stores result in R0.

3. Final Answer:

   LDR R1, [R4, #8] ADD R0, R1, #5 -> Option D

4. Quick Check:

   Offset load then immediate add = LDR R1, [R4, #8] ADD R0, R1, #5 [OK]

Hint: Load with offset first, then add immediate value [OK]

Common Mistakes:

• Mixing immediate and offset values incorrectly
• Using register instead of immediate for offset
• Loading directly into R0 then adding wrong offset