Why layout determines board manufacturability in PCB Design - Business Case Study

Scenario Mode

👤 Your Role: You are a PCB design engineer working closely with the manufacturing team.

📋 Request: Your manager wants a report explaining how the PCB layout affects the manufacturability of the board and what layout factors impact production efficiency and quality.

📊 Data: You have data from previous PCB production runs including layout parameters (trace width, spacing, via count, layer count), manufacturing defects, production time, and yield percentage.

🎯 Deliverable: Create a dashboard report that shows how different layout factors influence manufacturability metrics like defect rate, production time, and yield.

Sample Data

Board_ID	Trace_Width_mm	Trace_Spacing_mm	Via_Count	Layer_Count	Defect_Count	Production_Time_hours	Yield_Percentage
B001	0.15	0.15	50	4	5	10	95
B002	0.10	0.10	80	6	12	15	85
B003	0.20	0.20	30	2	2	8	98
B004	0.12	0.12	70	6	10	14	88
B005	0.18	0.18	40	4	3	9	96
B006	0.08	0.08	90	8	15	18	80
B007	0.22	0.22	25	2	1	7	99
B008	0.14	0.14	60	6	8	13	90

1

Step 1: Create a table showing average Defect_Count grouped by Trace_Width_mm ranges (e.g., <0.12, 0.12-0.18, >0.18).

Group boards by Trace_Width_mm ranges: <0.12, 0.12-0.18, >0.18; then calculate average Defect_Count for each group.

Expected Result

Average Defect_Count: <0.12 = 14, 0.12-0.18 = 6.5, >0.18 = 1.5

2

Step 2: Create a bar chart showing average Production_Time_hours by Layer_Count.

Group data by Layer_Count; calculate average Production_Time_hours for each Layer_Count.

Expected Result

Layer 2: 7.5 hours, Layer 4: 9.5 hours, Layer 6: 14 hours, Layer 8: 18 hours

3

Step 3: Calculate correlation between Via_Count and Defect_Count to see if more vias increase defects.

Use correlation formula between Via_Count and Defect_Count columns.

Expected Result

Correlation coefficient approximately 0.95 indicating strong positive correlation.

4

Step 4: Create a scatter plot of Trace_Spacing_mm vs Yield_Percentage to observe impact of spacing on yield.

Plot Trace_Spacing_mm on X-axis and Yield_Percentage on Y-axis for each board.

Expected Result

Higher Trace_Spacing_mm values correspond to higher Yield_Percentage.

5

Step 5: Summarize findings in a dashboard with charts and tables showing how layout factors affect manufacturability.

Combine previous visuals and add text boxes explaining key insights.

Expected Result

Dashboard clearly shows wider traces and spacing reduce defects and improve yield; more layers and vias increase production time and defects.

Final Result

Manufacturability Dashboard

Trace Width vs Defects:
<0.12mm | ##### (14 defects)
0.12-0.18mm | ### (6.5 defects)
>0.18mm | # (1.5 defects)

Production Time by Layers:
2 Layers: ## (7.5 hrs)
4 Layers: ### (9.5 hrs)
6 Layers: ##### (14 hrs)
8 Layers: ####### (18 hrs)

Via Count vs Defects: Strong positive correlation

Trace Spacing vs Yield: Wider spacing leads to higher yield

✓Boards with narrower trace widths (<0.12mm) have higher defect counts.

✓Increasing the number of layers increases production time significantly.

✓More vias on the board strongly correlate with more defects.

✓Wider trace spacing improves yield percentage.

✓Optimizing layout by increasing trace width and spacing while minimizing vias and layers improves manufacturability.

Bonus Challenge

Create a predictive model using the layout parameters to estimate defect count before manufacturing.

Show Hint

Use linear regression with Trace_Width_mm, Trace_Spacing_mm, Via_Count, and Layer_Count as input features.