Clock polarity and phase (CPOL, CPHA) in Embedded C

Introduction

Clock polarity and phase settings control how data is sent and received in SPI communication. They make sure both devices agree on when to read and write bits.

When connecting a microcontroller to a sensor that uses SPI communication.

When setting up communication between two devices that share a clock signal.

When troubleshooting data errors in SPI communication.

When configuring SPI settings for a new hardware module.

When you need to match the clock settings of an external device to communicate correctly.

Syntax

Embedded C

SPI_InitTypeDef SPI_InitStructure;

SPI_InitStructure.CPOL = SPI_CPOL_Low;  // Clock polarity: clock idle state low
SPI_InitStructure.CPHA = SPI_CPHA_1Edge; // Clock phase: data captured on first clock edge

CPOL sets the idle state of the clock line (0 = low, 1 = high).

CPHA sets which clock edge data is sampled on (first or second).

Examples

Clock is low when idle, data is sampled on the first clock edge.

Embedded C

SPI_InitStructure.CPOL = SPI_CPOL_Low;
SPI_InitStructure.CPHA = SPI_CPHA_1Edge;

Clock is high when idle, data is sampled on the second clock edge.

Embedded C

SPI_InitStructure.CPOL = SPI_CPOL_High;
SPI_InitStructure.CPHA = SPI_CPHA_2Edge;

Clock is low when idle, data is sampled on the second clock edge.

Embedded C

SPI_InitStructure.CPOL = SPI_CPOL_Low;
SPI_InitStructure.CPHA = SPI_CPHA_2Edge;

Clock is high when idle, data is sampled on the first clock edge.

Embedded C

SPI_InitStructure.CPOL = SPI_CPOL_High;
SPI_InitStructure.CPHA = SPI_CPHA_1Edge;

Sample Program

This program sets up SPI clock polarity and phase, then prints the settings. It shows how CPOL and CPHA control SPI timing.

Embedded C

#include <stdio.h>

// Simulated SPI configuration structure
typedef struct {
    int CPOL; // Clock polarity
    int CPHA; // Clock phase
} SPI_InitTypeDef;

// Constants for CPOL
#define SPI_CPOL_Low 0
#define SPI_CPOL_High 1

// Constants for CPHA
#define SPI_CPHA_1Edge 0
#define SPI_CPHA_2Edge 1

void SPI_Init(SPI_InitTypeDef* SPI_InitStruct) {
    printf("SPI Clock Polarity (CPOL): %s\n", SPI_InitStruct->CPOL == SPI_CPOL_Low ? "Low (0)" : "High (1)");
    printf("SPI Clock Phase (CPHA): %s\n", SPI_InitStruct->CPHA == SPI_CPHA_1Edge ? "1st Edge (0)" : "2nd Edge (1)");
}

int main() {
    SPI_InitTypeDef SPI_Config;

    // Set clock polarity to low (idle low)
    SPI_Config.CPOL = SPI_CPOL_Low;
    // Set clock phase to first edge
    SPI_Config.CPHA = SPI_CPHA_1Edge;

    SPI_Init(&SPI_Config);

    return 0;
}

Important Notes

CPOL and CPHA must match on both SPI devices to communicate correctly.

Changing CPOL changes the clock's idle state, while CPHA changes when data is sampled.

Incorrect CPOL/CPHA settings cause data errors or no communication.

Summary

CPOL sets the clock's idle level (low or high).

CPHA sets which clock edge data is read or written.

Both must be set correctly for SPI devices to talk properly.

Practice

1.

What does the CPOL setting control in SPI communication?

easy

A. The speed of the clock signal

B. The idle level of the clock signal (high or low)

C. The data bit order (MSB or LSB first)

D. The voltage level of the data line

Solution

1. Step 1: Understand CPOL meaning

   CPOL stands for Clock Polarity and it defines the idle state of the clock line in SPI communication.

2. Step 2: Identify what CPOL controls

   CPOL sets whether the clock signal is low or high when idle (not toggling).

3. Final Answer:

   The idle level of the clock signal (high or low) -> Option B

4. Quick Check:

   CPOL = Clock idle level [OK]

Hint: CPOL = Clock idle level, remember idle means 'rest' state [OK]

Common Mistakes:

• Confusing CPOL with clock speed
• Thinking CPOL controls data order
• Mixing CPOL with voltage levels

2.

Which of the following is the correct way to set CPHA to 1 in embedded C?

SPI->CR1 = ...;

easy

A. SPI->CR1 |= (1 << 1);

B. SPI->CR1 |= (1 << 2);

C. SPI->CR1 |= (1 << 0);

D. SPI->CR1 |= (1 << 3);

Solution

1. Step 1: Identify CPHA bit position

   In many SPI controllers, CPHA is bit 1 (second bit) in the control register.

2. Step 2: Set CPHA bit correctly

   Setting CPHA to 1 means setting bit 1, so use (1 << 1) to set that bit.

3. Final Answer:

   SPI->CR1 |= (1 << 1); -> Option A

4. Quick Check:

   CPHA bit = 1 << 1 [OK]

Hint: CPHA usually bit 1, so shift 1 by 1 [OK]

Common Mistakes:

• Using wrong bit shift for CPHA
• Confusing CPHA with CPOL bit position
• Forgetting to use bitwise OR to set bit

3.

Given the following code snippet, what is the SPI mode configured?

SPI->CR1 = (1 << 1) | (1 << 0);

Assuming bit 0 = CPOL and bit 1 = CPHA.

medium

A. CPOL=0, CPHA=1 (Mode 1)

B. CPOL=1, CPHA=0 (Mode 2)

C. CPOL=1, CPHA=1 (Mode 3)

D. CPOL=0, CPHA=0 (Mode 0)

Solution

1. Step 1: Decode bits from CR1 value

   The value sets bit 0 and bit 1 to 1, so CPOL=1 and CPHA=1.

2. Step 2: Match CPOL and CPHA to SPI mode

   CPOL=1 and CPHA=1 corresponds to SPI Mode 3.

3. Final Answer:

   CPOL=1, CPHA=1 (Mode 3) -> Option C

4. Quick Check:

   Bits 0 and 1 set = CPOL=1, CPHA=1 [OK]

Hint: Bit 0 = CPOL, bit 1 = CPHA, both 1 means Mode 3 [OK]

Common Mistakes:

• Mixing up which bit is CPOL or CPHA
• Confusing SPI mode numbers
• Ignoring bit positions in register

4.

Identify the error in this SPI configuration code snippet:

SPI->CR1 = (1 << 2); // Set CPHA to 1

Assuming CPHA is bit 1 and CPOL is bit 0.

medium

A. CPHA bit is incorrectly set at bit 2 instead of bit 1

B. CPOL bit should be set before CPHA

C. The code should clear other bits before setting CPHA

D. CPHA cannot be set using bit shifts

Solution

1. Step 1: Check CPHA bit position

   CPHA is bit 1, but code sets bit 2, which is incorrect.

2. Step 2: Understand correct bit setting

   To set CPHA, bit 1 must be set using (1 << 1), not (1 << 2).

3. Final Answer:

   CPHA bit is incorrectly set at bit 2 instead of bit 1 -> Option A

4. Quick Check:

   CPHA = bit 1, code sets bit 2 [OK]

Hint: CPHA is bit 1, not bit 2; check bit positions carefully [OK]

Common Mistakes:

• Setting wrong bit for CPHA
• Assuming CPHA is bit 2 by mistake
• Not verifying hardware documentation

5.

You need to configure SPI to Mode 0 (CPOL=0, CPHA=0) but your device only works if data is sampled on the second clock edge. How should you set CPOL and CPHA?

hard

A. CPOL=0, CPHA=0 to sample on second edge

B. CPOL=1, CPHA=0 to sample on second edge

C. CPOL=1, CPHA=1 to sample on second edge

D. CPOL=0, CPHA=1 to sample on second edge

Solution

1. Step 1: Understand SPI Mode 0 settings

   Mode 0 means CPOL=0 (clock idle low) and CPHA=0 (sample on first edge).

2. Step 2: Adjust CPHA to sample on second edge

   To sample on the second clock edge, CPHA must be set to 1, keeping CPOL=0.

3. Step 3: Confirm final settings

   Set CPOL=0 and CPHA=1 to keep clock idle low but sample on second edge.

4. Final Answer:

   CPOL=0, CPHA=1 to sample on second edge -> Option D

5. Quick Check:

   Sample second edge = CPHA=1 [OK]

Hint: CPHA=1 means sample on second edge, CPOL controls idle level [OK]

Common Mistakes:

• Assuming Mode 0 always means sample on first edge
• Changing CPOL when only CPHA needed
• Not knowing which edge is first or second