DMA controller concept in Embedded C - Step-by-Step Execution

Concept Flow - DMA controller concept

CPU Initiates DMA

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DMA Controller Setup

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DMA Transfers Data

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DMA Signals Completion

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CPU Resumes Normal Operation

The CPU sets up the DMA controller, which then transfers data directly between memory and peripherals, freeing the CPU until the transfer completes.

Execution Sample

Embedded C

void dma_transfer(void *src, void *dst, size_t size) {
    DMA->SRC = src;
    DMA->DST = dst;
    DMA->SIZE = size;
    DMA->CTRL |= START;
    while (!(DMA->STATUS & DONE)) {}
}

This code sets up and starts a DMA transfer, then waits until the transfer is done.

Execution Table

Step	Action	DMA Registers	CPU Status	Result
1	CPU sets DMA->SRC to source address	SRC=src_addr	CPU idle	Source set
2	CPU sets DMA->DST to destination address	DST=dst_addr	CPU idle	Destination set
3	CPU sets DMA->SIZE to transfer size	SIZE=size	CPU idle	Size set
4	CPU sets DMA->CTRL START bit	CTRL=START	CPU idle	Transfer started
5	DMA controller transfers data	STATUS=busy	CPU waiting	Data moving
6	DMA controller sets STATUS DONE bit	STATUS=DONE	CPU waiting	Transfer complete
7	CPU detects DMA done, resumes work	CTRL=idle	CPU active	CPU resumes

💡 DMA STATUS DONE bit set, CPU resumes normal operation

Variable Tracker

Variable	Start	After Step 1	After Step 2	After Step 3	After Step 4	After Step 6	Final
DMA->SRC	undefined	src_addr	src_addr	src_addr	src_addr	src_addr	src_addr
DMA->DST	undefined	undefined	dst_addr	dst_addr	dst_addr	dst_addr	dst_addr
DMA->SIZE	0	0	0	size	size	size	size
DMA->CTRL	0	0	0	0	START	START	idle
DMA->STATUS	0	0	0	0	busy	DONE	DONE
CPU Status	active	idle	idle	idle	idle	waiting	active

Key Moments - 3 Insights

Why does the CPU wait after starting the DMA transfer?

The CPU waits because the DMA controller is busy transferring data (see execution_table step 5), so the CPU pauses until the DMA signals completion.

Does the CPU move the data during DMA transfer?

No, the DMA controller moves data directly between memory and peripherals, freeing the CPU (execution_table step 5 shows DMA doing the transfer).

What signals the CPU that the DMA transfer is complete?

The DMA controller sets the STATUS DONE bit (step 6), which the CPU checks to know it can resume work.

Visual Quiz - 3 Questions

Look at the execution_table, what is the value of DMA->CTRL after step 4?

A START

B idle

C DONE

D 0

💡 Hint

Check the DMA->CTRL column in execution_table row for step 4

At which step does the CPU resume normal operation?

A Step 5

B Step 6

C Step 7

D Step 4

💡 Hint

Look at the CPU Status and Result columns in execution_table

If DMA->STATUS never sets DONE, what happens to the CPU?

A CPU continues working normally

B CPU waits forever in the while loop

C CPU restarts the DMA transfer

D CPU ignores DMA and proceeds

💡 Hint

Refer to the while loop waiting for DMA->STATUS DONE bit in the code and execution_table step 5

Concept Snapshot

DMA Controller Concept:
- CPU sets source, destination, size in DMA registers
- CPU starts DMA transfer by setting START bit
- DMA controller moves data independently
- CPU waits until DMA signals DONE
- CPU resumes work after transfer completes

Full Transcript

This visual execution trace shows how a DMA controller works in embedded C. The CPU first sets the DMA source, destination, and size registers. Then it starts the transfer by setting the START bit in the control register. The DMA controller takes over and moves data directly between memory and peripherals, freeing the CPU. The CPU waits in a loop checking the DMA status. When the DMA sets the DONE bit, the CPU detects it and resumes normal operation. Variables like DMA->SRC, DMA->DST, DMA->SIZE, DMA->CTRL, and DMA->STATUS change step-by-step as shown. Key moments clarify why the CPU waits and how the DMA signals completion. The quiz tests understanding of register values and CPU behavior during DMA transfer.