DMA controller concept in Embedded C - Practice Problems & Coding Challenges

Challenge - 5 Problems

❓ Predict Output

intermediate

DMA Transfer Completion Flag Check

What is the output of this embedded C code snippet simulating a DMA transfer completion flag check?

Embedded C

#include <stdio.h>

#define DMA_FLAG_TC (1 << 1)  // Transfer complete flag

unsigned int DMA_StatusRegister = 0;

void simulate_dma_transfer() {
    DMA_StatusRegister |= DMA_FLAG_TC;  // Set transfer complete flag
}

int main() {
    simulate_dma_transfer();
    if (DMA_StatusRegister & DMA_FLAG_TC) {
        printf("DMA Transfer Completed\n");
    } else {
        printf("DMA Transfer Not Completed\n");
    }
    return 0;
}

A DMA Transfer Not Completed

B Compilation error due to undefined DMA_FLAG_TC

C DMA Transfer Completed

D Runtime error due to invalid memory access

💡 Hint

Check how the DMA status register flag is set and tested using bitwise AND.

The code sets the DMA transfer complete flag in the status register. The if condition checks this flag using bitwise AND. Since the flag is set, the output is "DMA Transfer Completed".

🧠 Conceptual

intermediate

DMA Controller Purpose

What is the primary purpose of a DMA controller in embedded systems?

A To transfer data between peripherals and memory without CPU intervention

B To manage interrupts from multiple devices

C To increase the CPU clock speed automatically

D To allow the CPU to directly access external memory faster

💡 Hint

Think about how DMA helps reduce CPU workload during data transfer.

The DMA controller transfers data directly between peripherals and memory, freeing the CPU to perform other tasks. It does not increase CPU speed or manage interrupts.

🔧 Debug

advanced

DMA Transfer Size Configuration Bug

Identify the error in this DMA transfer size configuration code snippet.

Embedded C

typedef struct {
    unsigned int CCR;
    unsigned int CNDTR;
    unsigned int CPAR;
    unsigned int CMAR;
} DMA_Channel_TypeDef;

DMA_Channel_TypeDef DMA1_Channel1;

void configure_dma_transfer(unsigned int size) {
    DMA1_Channel1.CNDTR = size;
    DMA1_Channel1.CCR |= (1 << 0); // Enable DMA channel
}

int main() {
    configure_dma_transfer(0);
    if (DMA1_Channel1.CNDTR == 0) {
        // Start transfer
        // ...
        return 1;
    }
    return 0;
}

A DMA transfer size is zero, so no data will be transferred

B DMA channel is not enabled due to missing bit set in CCR

C DMA1_Channel1 is not initialized, causing undefined behavior

D DMA transfer size should be set after enabling the channel

💡 Hint

Check the value assigned to the transfer size and its effect on the transfer.

The transfer size is set to zero, meaning no data will be transferred. The DMA channel is enabled correctly, and the struct is initialized globally, so the main issue is the zero size.

📝 Syntax

advanced

DMA Interrupt Handler Syntax

Which option shows the correct syntax for a DMA interrupt handler function in embedded C?

A void DMA1_Channel1_IRQHandler(void) -> void { /* handler code */ }

B int DMA1_Channel1_IRQHandler() { /* handler code */ }

C void DMA1_Channel1_IRQHandler() { /* handler code */ }

D void DMA1_Channel1_IRQHandler(void) { /* handler code */ }

💡 Hint

Consider the standard C syntax for interrupt handlers in embedded systems.

Interrupt handlers in embedded C typically have a void return type and take void parameters. Option D matches this exactly. Option D returns int, which is incorrect. Option D lacks the void parameter list, which is allowed but less explicit. Option D uses invalid syntax.

🚀 Application

expert

DMA Circular Mode Behavior

Given a DMA configured in circular mode to transfer 4 bytes repeatedly from a peripheral to memory, what will be the value of the transfer count register (CNDTR) after 10 transfers?

Embedded C

typedef struct {
    unsigned int CCR;
    unsigned int CNDTR;
    unsigned int CPAR;
    unsigned int CMAR;
} DMA_Channel_TypeDef;

DMA_Channel_TypeDef DMA1_Channel1 = {0};

void configure_dma_circular(unsigned int size) {
    DMA1_Channel1.CNDTR = size;
    DMA1_Channel1.CCR |= (1 << 5); // Circular mode enable
    DMA1_Channel1.CCR |= (1 << 0); // Enable DMA channel
}

void simulate_transfer() {
    DMA1_Channel1.CNDTR--;
    if (DMA1_Channel1.CNDTR == 0) {
        DMA1_Channel1.CNDTR = 4; // Reload in circular mode
    }
}

int main() {
    configure_dma_circular(4);
    for (int i = 0; i < 10; i++) {
        simulate_transfer();
    }
    return DMA1_Channel1.CNDTR;
}

A 4

B 2

C 0

D 6

💡 Hint

Count how the CNDTR value changes each transfer and resets after reaching zero.

The DMA starts with CNDTR=4. Each transfer decreases it by 1. When it reaches 0, it reloads to 4. After 10 transfers, the count is 2.