Complete the code to enable clock gating for the peripheral.
CLK_CTRL_REG |= [1]; // Enable clock gatingSetting CLK_GATE_ENABLE enables clock gating, which saves power by stopping the clock to unused peripherals.
Complete the code to disable clock gating for the peripheral.
CLK_CTRL_REG &= ~[1]; // Disable clock gatingUsing CLK_GATE_ENABLE_BIT with bitwise NOT disables the clock gating by clearing the bit.
Fix the error in the clock gating control code.
if ((CLK_CTRL_REG & [1]) == 0) { enable_clock_gating(); }
The code checks if the clock gating enable bit is cleared (0) to enable clock gating. So it must check CLK_GATE_ENABLE_BIT.
Fill both blanks to create a clock gating control macro.
#define SET_CLOCK_GATING(reg, bit) \ do { \ (reg) [1]= (bit); \ } while(0) #define CLEAR_CLOCK_GATING(reg, bit) \ do { \ (reg) [2]= (bit); \ } while(0)
To set a bit, use bitwise OR |=. To clear a bit, use bitwise AND with the bitwise NOT &= ~. Here, CLEAR_CLOCK_GATING uses &= and expects the bit to be complemented before passing.
Fill all three blanks to implement a function that gates clock based on enable flag.
void clock_gate_control(volatile uint32_t *reg, uint32_t bit, bool enable) {
if (enable) {
*reg [1]= bit; // Enable clock gating
} else {
*reg [2]= [3] bit; // Disable clock gating
}
}To enable clock gating, set the bit with OR assignment |=. To disable, clear the bit by AND assignment &= with the complement ~ of the bit.