Clock gating for power saving in Embedded C - Time & Space Complexity

Time Complexity: Clock gating for power saving

O(n)

Understanding Time Complexity

We want to see how the time cost changes when using clock gating in embedded C code.

How does adding clock gating affect the number of operations as input grows?

Scenario Under Consideration

Analyze the time complexity of the following code snippet.

void process_data(int *data, int size) {
    enable_clock();
    for (int i = 0; i < size; i++) {
        data[i] = data[i] * 2;
    }
    disable_clock();
}
    

This code enables the clock, processes an array by doubling each element, then disables the clock.

Identify Repeating Operations

Identify the loops, recursion, array traversals that repeat.

• Primary operation: The for-loop that doubles each element in the array.
• How many times: Exactly once for each element, so 'size' times.

How Execution Grows With Input

As the array size grows, the loop runs more times, increasing total operations.

Input Size (n)	Approx. Operations
10	About 10 multiplications
100	About 100 multiplications
1000	About 1000 multiplications

Pattern observation: The number of operations grows directly with input size.

Final Time Complexity

Time Complexity: O(n)

This means the time to run the code grows in a straight line as the input size grows.

Common Mistake

[X] Wrong: "Clock gating reduces the number of operations in the loop."

[OK] Correct: Clock gating only turns the clock on or off to save power; it does not skip or reduce the loop's work.

Interview Connect

Understanding how clock gating affects code helps show you know both power saving and performance trade-offs in embedded systems.

Self-Check

"What if the clock was enabled and disabled inside the loop for each element? How would the time complexity change?"

Practice

1. What is the main purpose of clock gating in embedded systems?

easy

A. To enable all hardware modules simultaneously

B. To increase the clock speed of the processor

C. To reset the microcontroller

D. To save power by turning off clocks to unused modules

Solution

1. Step 1: Understand clock gating concept

   Clock gating disables the clock signal to parts of a chip that are not in use.

2. Step 2: Identify the main benefit

   Disabling clocks reduces power consumption and heat generation.

3. Final Answer:

   To save power by turning off clocks to unused modules -> Option D

4. Quick Check:

   Clock gating = power saving [OK]

Hint: Clock gating means stopping clocks to save power [OK]

Common Mistakes:

• Thinking clock gating speeds up the processor
• Confusing clock gating with resetting hardware
• Assuming clock gating enables all modules

2. Which of the following is the correct way to enable clock gating for a peripheral in embedded C?

easy

A. CLK_GATE_REG |= (1 << PERIPHERAL_BIT);

B. CLK_GATE_REG &= ~(1 << PERIPHERAL_BIT);

C. CLK_GATE_REG = 0;

D. CLK_GATE_REG ^= (1 << PERIPHERAL_BIT);

Solution

1. Step 1: Understand bit setting for enabling clock gating

   Setting a bit (using |=) enables clock gating for that peripheral.

2. Step 2: Analyze each option

   CLK_GATE_REG |= (1 << PERIPHERAL_BIT); sets the bit; CLK_GATE_REG &= ~(1 << PERIPHERAL_BIT); clears it; CLK_GATE_REG = 0; clears all bits; CLK_GATE_REG ^= (1 << PERIPHERAL_BIT); toggles bits.

3. Final Answer:

   CLK_GATE_REG |= (1 << PERIPHERAL_BIT); -> Option A

4. Quick Check:

   Set bit to enable clock gating [OK]

Hint: Use |= to set bits for enabling clock gating [OK]

Common Mistakes:

• Using &=~ which clears bits instead of setting
• Assigning 0 clears all bits
• Using ^= toggles bits unpredictably

3. Given the code snippet:

uint32_t CLK_GATE_REG = 0x0;
#define PERIPH1_BIT 2
CLK_GATE_REG |= (1 << PERIPH1_BIT);
CLK_GATE_REG &= ~(1 << PERIPH1_BIT);

What is the final value of CLK_GATE_REG?

medium

A. 0x4

B. 0x0

C. 0x2

D. 0x6

Solution

1. Step 1: Set bit 2 in CLK_GATE_REG

   CLK_GATE_REG |= (1 << 2) sets bit 2, so value becomes 0x4.

2. Step 2: Clear bit 2 in CLK_GATE_REG

   CLK_GATE_REG &= ~(1 << 2) clears bit 2, so value returns to 0x0.

3. Final Answer:

   0x0 -> Option B

4. Quick Check:

   Set then clear bit 2 = 0x0 [OK]

Hint: Set then clear same bit results in zero [OK]

Common Mistakes:

• Forgetting that clearing bit resets value
• Confusing bit positions
• Assuming bits accumulate without clearing

4. Identify the error in this clock gating code snippet:

uint32_t CLK_GATE_REG = 0xFF;
#define PERIPH2_BIT 3
CLK_GATE_REG = (1 << PERIPH2_BIT);

medium

A. It toggles bit 3 instead of setting it

B. It correctly enables clock gating for peripheral 2

C. It clears all bits except bit 3, disabling other clocks

D. It causes a syntax error due to missing semicolon

Solution

1. Step 1: Analyze the assignment operation

   Assigning CLK_GATE_REG = (1 << 3) overwrites previous bits, clearing all except bit 3.

2. Step 2: Understand impact on clock gating

   This disables clock gating for other peripherals unintentionally.

3. Final Answer:

   It clears all bits except bit 3, disabling other clocks -> Option C

4. Quick Check:

   Direct assignment clears other bits [OK]

Hint: Use |= to set bits, not = to avoid clearing others [OK]

Common Mistakes:

• Using = instead of |= to set bits
• Ignoring impact on other bits
• Thinking this toggles bits

5. You want to save power by gating clocks to peripherals only when they are idle. Which approach correctly implements this in embedded C?

void update_clock_gating(bool peripheral_active) {
    if (peripheral_active) {
        CLK_GATE_REG &= ~(1 << PERIPH_BIT); // Disable gating
    } else {
        CLK_GATE_REG |= (1 << PERIPH_BIT);  // Enable gating
    }
}

hard

A. This code correctly enables gating when peripheral is idle

B. This code enables gating when peripheral is active, which wastes power

C. This code disables gating in both cases, no power saving

D. This code causes syntax errors due to missing variable declarations

Solution

1. Step 1: Understand gating logic in code

   When peripheral_active is true, gating is disabled (clock runs). When false, gating is enabled (clock off).

2. Step 2: Confirm power saving behavior

   Enabling gating only when peripheral is idle saves power correctly.

3. Final Answer:

   This code correctly enables gating when peripheral is idle -> Option A

4. Quick Check:

   Gating enabled when idle = power saving [OK]

Hint: Enable gating only when peripheral is idle [OK]

Common Mistakes:

• Reversing active and idle logic
• Forgetting to use |= and &=~ correctly
• Assuming code has syntax errors without checking