UART interrupt-driven communication in Embedded C - Interactive Code Practice

Practice - 5 Tasks

1fill in blank

easy

Complete the code to enable UART receive interrupt.

Embedded C

UART->CR1 |= [1];

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AUART_CR1_TXEIE

BUART_CR1_RXNEIE

CUART_CR1_TE

DUART_CR1_RE

Attempts:

3 left

💡 Hint

Common Mistakes

Using UART_CR1_TXEIE which enables transmit interrupt instead of receive.

Using UART_CR1_TE or UART_CR1_RE which enable transmitter or receiver but not interrupts.

UART_CR1_RXNEIE enables the receive data register not empty interrupt.

2fill in blank

medium

Complete the code to clear the UART receive interrupt flag inside the ISR.

Embedded C

if (UART->ISR & UART_ISR_RXNE) {
    uint8_t data = UART->RDR;
    UART->ICR = [1];
}

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AUART_ICR_IDLECF

BUART_ICR_RXNECF

CUART_ICR_ORECF

DUART_ICR_TCCF

Attempts:

3 left

💡 Hint

Common Mistakes

Trying to clear RXNE flag manually which is cleared by reading RDR.

Clearing unrelated flags like IDLE or transmission complete.

Reading RDR clears RXNE flag automatically, but overrun error flag (ORE) must be cleared manually using UART_ICR_ORECF.

3fill in blank

hard

Fix the error in the UART interrupt handler to correctly read received data.

Embedded C

void USART1_IRQHandler(void) {
    if (UART->ISR & [1]) {
        uint8_t received = UART->RDR;
        process(received);
    }
}

Drag options to blanks, or click blank then click option'

AUART_ISR_TXE

BUART_ISR_PE

CUART_ISR_TC

DUART_ISR_RXNE

Attempts:

3 left

💡 Hint

Common Mistakes

Using TXE which is transmit data register empty flag.

Using TC which is transmission complete flag.

UART_ISR_RXNE indicates that data is ready to be read from the receive data register.

4fill in blank

hard

Fill both blanks to create a dictionary comprehension that maps received bytes to their ASCII codes only if the byte is a letter.

Embedded C

received_map = {byte: ord(byte) for byte in buffer if byte [1] [2]

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A>=

B'a'

C'A'

D<=

Attempts:

3 left

💡 Hint

Common Mistakes

Using '<=' instead of '>=' causing wrong filtering.

Using 'a' which is lowercase and misses uppercase letters.

The comprehension filters bytes greater or equal to 'A' to include letters.

5fill in blank

hard

Fill all three blanks to build a dictionary comprehension that maps uppercase letters to their ASCII codes only if the code is less than 91.

Embedded C

uppercase_map = { [1] : [2] for [3] in buffer if ord([3]) < 91 }

Drag options to blanks, or click blank then click option'

Achar

Bord(char)

Dbyte

Attempts:

3 left

💡 Hint

Common Mistakes

Using different variable names inconsistently.

Not using ord() for the value.

The comprehension uses 'char' as key and ord(char) as value for letters with ASCII less than 91 (uppercase letters).

Practice

1. What is the main advantage of using UART interrupt-driven communication in embedded systems?

easy

A. It allows the CPU to perform other tasks while waiting for UART data.

B. It requires the CPU to constantly check the UART status manually.

C. It disables all other interrupts during UART communication.

D. It slows down data transmission to avoid errors.

Solution

1. Step 1: Understand UART polling vs interrupt

   Polling requires CPU to wait and check UART status repeatedly, wasting time.

2. Step 2: Identify interrupt-driven benefit

   Interrupt-driven UART lets CPU do other work and only handles UART when data arrives.

3. Final Answer:

   It allows the CPU to perform other tasks while waiting for UART data. -> Option A

4. Quick Check:

   Interrupt-driven = CPU multitasks [OK]

Hint: Interrupts free CPU from waiting, improving multitasking [OK]

Common Mistakes:

• Confusing polling with interrupt-driven method
• Thinking interrupts disable other tasks
• Assuming interrupt slows communication

2. Which of the following is the correct way to enable UART receive interrupt in embedded C?

easy

A. UART->CR1 &= ~UART_CR1_RXNEIE;

B. UART->CR1 = 0;

C. UART->CR1 |= UART_CR1_RXNEIE;

D. UART->CR1 |= UART_CR1_TXEIE;

Solution

1. Step 1: Identify RX interrupt enable bit

   UART_CR1_RXNEIE enables receive-not-empty interrupt.

2. Step 2: Enable RX interrupt without clearing other bits

   Use bitwise OR (|=) to set RXNEIE bit.

3. Final Answer:

   UART->CR1 |= UART_CR1_RXNEIE; -> Option C

4. Quick Check:

   Enable RX interrupt = |= UART_CR1_RXNEIE [OK]

Hint: Use |= to set interrupt enable bits without clearing others [OK]

Common Mistakes:

• Using &= ~ to enable instead of disable bits
• Setting TX interrupt instead of RX
• Overwriting CR1 register instead of OR-ing

3. Given this UART interrupt handler code snippet, what will be the output if a byte 'A' (0x41) is received?

void USART1_IRQHandler(void) {
  if (USART1->SR & USART_SR_RXNE) {
    char data = USART1->DR;
    USART1->DR = data + 1;
  }
}

medium

A. The UART sends back 'A' unchanged.

B. The UART sends back 'B' (0x42) after receiving 'A'.

C. The UART sends back 'C' (0x43) after receiving 'A'.

D. No data is sent back.

Solution

1. Step 1: Read received data

   Data 'A' (0x41) is read from USART1->DR.

2. Step 2: Write back data + 1

   Data + 1 = 0x41 + 1 = 0x42, which is 'B'.

3. Final Answer:

   The UART sends back 'B' (0x42) after receiving 'A'. -> Option B

4. Quick Check:

   Received 'A' + 1 = 'B' [OK]

Hint: Adding 1 to 'A' (0x41) gives 'B' (0x42) [OK]

Common Mistakes:

• Confusing ASCII values and characters
• Assuming data is unchanged
• Ignoring the addition operation

4. Identify the bug in this UART interrupt handler code:

void USART2_IRQHandler(void) {
  if (USART2->SR & USART_SR_TXE) {
    USART2->DR = tx_buffer[tx_index++];
  }
  USART2->SR &= ~USART_SR_TXE;
}

medium

A. The USART2->DR register should not be written inside the interrupt.

B. The interrupt handler should clear RXNE flag instead of TXE.

C. The tx_index variable is not incremented correctly.

D. Clearing the TXE flag manually is incorrect; it is cleared by hardware.

Solution

1. Step 1: Understand TXE flag behavior

   TXE (transmit data register empty) flag is cleared automatically by hardware when data is written to DR.

2. Step 2: Identify incorrect manual clearing

   Code tries to clear TXE by writing to SR register, which is read-only or managed by hardware.

3. Final Answer:

   Clearing the TXE flag manually is incorrect; it is cleared by hardware. -> Option D

4. Quick Check:

   TXE flag cleared by hardware, not software [OK]

Hint: TXE flag clears automatically; don't clear it manually [OK]

Common Mistakes:

• Trying to clear hardware-managed flags manually
• Confusing TXE and RXNE flags
• Not incrementing buffer index properly

5. You want to implement a UART interrupt-driven echo program that receives data and immediately sends it back. Which sequence of actions should the interrupt handler perform to work correctly and efficiently?

hard

A. Check RXNE flag, read data from DR, write data back to DR, do not clear RXNE flag manually.

B. Clear RXNE flag manually, read data from DR, write data back to DR, check TXE flag.

C. Check TXE flag, write data to DR, clear TXE flag manually, then read data from DR.

D. Check RXNE flag, read data from DR, write data back to DR, clear RXNE flag manually.

Solution

1. Step 1: Handle RXNE flag correctly

   Check RXNE flag to know data received; read data from DR clears RXNE automatically.

2. Step 2: Write data back without manual flag clearing

   Write data to DR to send; TXE flag is managed by hardware, no manual clearing needed.

3. Final Answer:

   Check RXNE flag, read data from DR, write data back to DR, do not clear RXNE flag manually. -> Option A

4. Quick Check:

   Read clears RXNE; no manual flag clearing needed [OK]

Hint: Read clears RXNE; hardware manages flags automatically [OK]

Common Mistakes:

• Manually clearing RXNE or TXE flags
• Checking TXE before reading RXNE
• Writing data before reading received byte