UART interrupt-driven communication in Embedded C - Cheat Sheet & Quick Revision

Recall & Review

beginner

What is UART interrupt-driven communication?

It is a method where UART hardware triggers an interrupt when data is ready to send or receive, allowing the CPU to handle data only when needed, instead of constantly checking (polling).

beginner

Why use interrupts instead of polling in UART communication?

Interrupts let the CPU do other tasks and only respond when UART data is ready, saving processing time and power compared to polling which wastes CPU cycles checking repeatedly.

intermediate

In UART interrupt-driven communication, what typically triggers the interrupt?

An interrupt is triggered when the UART hardware's receive buffer has new data or the transmit buffer is empty and ready for new data.

intermediate

What is the role of an Interrupt Service Routine (ISR) in UART communication?

The ISR handles the UART interrupt by reading received data from the buffer or loading new data to transmit, ensuring smooth data flow without CPU polling.

advanced

How can you avoid data loss in UART interrupt-driven communication?

Use buffers (like circular buffers) in the ISR to store incoming data quickly, and process it later in the main program to avoid losing data if interrupts come fast.

What causes a UART interrupt in interrupt-driven communication?

A Timer overflow

B CPU finishing a task

C New data received or transmit buffer empty

D Power supply change

UART interrupts occur when new data arrives or the transmit buffer is ready for more data.

What is the main advantage of using UART interrupts over polling?

A Interrupts are slower than polling

B CPU can perform other tasks until interrupt occurs

C Polling uses less power

D Polling is more efficient

Interrupts free the CPU to do other work and respond only when UART needs attention.

What should an ISR do when UART data is received?

A Send a message to the user

B Ignore the data

C Reset the microcontroller

D Read data from UART buffer and store it

The ISR must quickly read and store incoming data to avoid loss.

Which data structure is commonly used to handle UART data in interrupts?

A Circular buffer

B Linked list

C Stack

D Binary tree

Circular buffers efficiently store continuous UART data streams.

What happens if UART interrupts are not handled quickly?

A Data loss may occur

B System speed increases

C UART stops working permanently

D CPU overheats

Delays in handling interrupts can cause incoming data to be overwritten and lost.

Explain how UART interrupt-driven communication works and why it is preferred over polling.

Think about how the CPU can do other work until UART needs attention.

Describe the role of the Interrupt Service Routine (ISR) in UART communication and how it prevents data loss.

Focus on what happens inside the ISR when UART signals an interrupt.

Practice

1. What is the main advantage of using UART interrupt-driven communication in embedded systems?

easy

A. It allows the CPU to perform other tasks while waiting for UART data.

B. It requires the CPU to constantly check the UART status manually.

C. It disables all other interrupts during UART communication.

D. It slows down data transmission to avoid errors.

Solution

1. Step 1: Understand UART polling vs interrupt

   Polling requires CPU to wait and check UART status repeatedly, wasting time.

2. Step 2: Identify interrupt-driven benefit

   Interrupt-driven UART lets CPU do other work and only handles UART when data arrives.

3. Final Answer:

   It allows the CPU to perform other tasks while waiting for UART data. -> Option A

4. Quick Check:

   Interrupt-driven = CPU multitasks [OK]

Hint: Interrupts free CPU from waiting, improving multitasking [OK]

Common Mistakes:

• Confusing polling with interrupt-driven method
• Thinking interrupts disable other tasks
• Assuming interrupt slows communication

2. Which of the following is the correct way to enable UART receive interrupt in embedded C?

easy

A. UART->CR1 &= ~UART_CR1_RXNEIE;

B. UART->CR1 = 0;

C. UART->CR1 |= UART_CR1_RXNEIE;

D. UART->CR1 |= UART_CR1_TXEIE;

Solution

1. Step 1: Identify RX interrupt enable bit

   UART_CR1_RXNEIE enables receive-not-empty interrupt.

2. Step 2: Enable RX interrupt without clearing other bits

   Use bitwise OR (|=) to set RXNEIE bit.

3. Final Answer:

   UART->CR1 |= UART_CR1_RXNEIE; -> Option C

4. Quick Check:

   Enable RX interrupt = |= UART_CR1_RXNEIE [OK]

Hint: Use |= to set interrupt enable bits without clearing others [OK]

Common Mistakes:

• Using &= ~ to enable instead of disable bits
• Setting TX interrupt instead of RX
• Overwriting CR1 register instead of OR-ing

3. Given this UART interrupt handler code snippet, what will be the output if a byte 'A' (0x41) is received?

void USART1_IRQHandler(void) {
  if (USART1->SR & USART_SR_RXNE) {
    char data = USART1->DR;
    USART1->DR = data + 1;
  }
}

medium

A. The UART sends back 'A' unchanged.

B. The UART sends back 'B' (0x42) after receiving 'A'.

C. The UART sends back 'C' (0x43) after receiving 'A'.

D. No data is sent back.

Solution

1. Step 1: Read received data

   Data 'A' (0x41) is read from USART1->DR.

2. Step 2: Write back data + 1

   Data + 1 = 0x41 + 1 = 0x42, which is 'B'.

3. Final Answer:

   The UART sends back 'B' (0x42) after receiving 'A'. -> Option B

4. Quick Check:

   Received 'A' + 1 = 'B' [OK]

Hint: Adding 1 to 'A' (0x41) gives 'B' (0x42) [OK]

Common Mistakes:

• Confusing ASCII values and characters
• Assuming data is unchanged
• Ignoring the addition operation

4. Identify the bug in this UART interrupt handler code:

void USART2_IRQHandler(void) {
  if (USART2->SR & USART_SR_TXE) {
    USART2->DR = tx_buffer[tx_index++];
  }
  USART2->SR &= ~USART_SR_TXE;
}

medium

A. The USART2->DR register should not be written inside the interrupt.

B. The interrupt handler should clear RXNE flag instead of TXE.

C. The tx_index variable is not incremented correctly.

D. Clearing the TXE flag manually is incorrect; it is cleared by hardware.

Solution

1. Step 1: Understand TXE flag behavior

   TXE (transmit data register empty) flag is cleared automatically by hardware when data is written to DR.

2. Step 2: Identify incorrect manual clearing

   Code tries to clear TXE by writing to SR register, which is read-only or managed by hardware.

3. Final Answer:

   Clearing the TXE flag manually is incorrect; it is cleared by hardware. -> Option D

4. Quick Check:

   TXE flag cleared by hardware, not software [OK]

Hint: TXE flag clears automatically; don't clear it manually [OK]

Common Mistakes:

• Trying to clear hardware-managed flags manually
• Confusing TXE and RXNE flags
• Not incrementing buffer index properly

5. You want to implement a UART interrupt-driven echo program that receives data and immediately sends it back. Which sequence of actions should the interrupt handler perform to work correctly and efficiently?

hard

A. Check RXNE flag, read data from DR, write data back to DR, do not clear RXNE flag manually.

B. Clear RXNE flag manually, read data from DR, write data back to DR, check TXE flag.

C. Check TXE flag, write data to DR, clear TXE flag manually, then read data from DR.

D. Check RXNE flag, read data from DR, write data back to DR, clear RXNE flag manually.

Solution

1. Step 1: Handle RXNE flag correctly

   Check RXNE flag to know data received; read data from DR clears RXNE automatically.

2. Step 2: Write data back without manual flag clearing

   Write data to DR to send; TXE flag is managed by hardware, no manual clearing needed.

3. Final Answer:

   Check RXNE flag, read data from DR, write data back to DR, do not clear RXNE flag manually. -> Option A

4. Quick Check:

   Read clears RXNE; no manual flag clearing needed [OK]

Hint: Read clears RXNE; hardware manages flags automatically [OK]

Common Mistakes:

• Manually clearing RXNE or TXE flags
• Checking TXE before reading RXNE
• Writing data before reading received byte