Timer prescaler and clock division in Embedded C - Interactive Code Practice

Practice - 5 Tasks

1fill in blank

easy

Complete the code to set the timer prescaler to divide the clock by 8.

Embedded C

TIM->PSC = [1] - 1;

Drag options to blanks, or click blank then click option'

A8

B4

C2

D16

Attempts:

3 left

💡 Hint

Common Mistakes

Setting PSC directly to 8 instead of 7.

Confusing prescaler value with division factor.

The prescaler register (PSC) divides the input clock by the value plus one. To divide by 8, set PSC to 7 (8 - 1).

2fill in blank

medium

Complete the code to configure the timer clock division to divide by 4.

Embedded C

TIM->CR1 |= [1];

Drag options to blanks, or click blank then click option'

ATIM_CR1_CKD_1

BTIM_CR1_CKD_0

CTIM_CR1_CKD_0 | TIM_CR1_CKD_1

DTIM_CR1_CKD_2

Attempts:

3 left

💡 Hint

Common Mistakes

Using only TIM_CR1_CKD_0 which sets division by 2.

Combining bits incorrectly.

To set clock division to divide by 4, set CKD bits to '10', which corresponds to TIM_CR1_CKD_1.

3fill in blank

hard

Fix the error in the code to correctly set the prescaler for a 1 MHz timer clock from an 8 MHz source.

Embedded C

TIM->PSC = [1];

Drag options to blanks, or click blank then click option'

A1

B8

C7

D0

Attempts:

3 left

💡 Hint

Common Mistakes

Setting PSC to 8 instead of 7.

Setting PSC to 0 which means no division.

To get 1 MHz from 8 MHz, divide by 8. Since PSC = division factor - 1, PSC should be 7.

4fill in blank

hard

Fill both blanks to create a timer configuration that sets prescaler to divide by 16 and clock division to divide by 2.

Embedded C

TIM->PSC = [1] - 1;
TIM->CR1 |= [2];

Drag options to blanks, or click blank then click option'

A16

BTIM_CR1_CKD_0

CTIM_CR1_CKD_1

D8

Attempts:

3 left

💡 Hint

Common Mistakes

Using wrong prescaler value.

Setting wrong clock division bits.

Prescaler for divide by 16 is 15 (16 - 1). Clock division by 2 is set by TIM_CR1_CKD_0.

5fill in blank

hard

Fill all three blanks to configure a timer with prescaler dividing by 10, clock division dividing by 4, and enable the timer counter.

Embedded C

TIM->PSC = [1] - 1;
TIM->CR1 |= [2];
TIM->CR1 |= [3];

Drag options to blanks, or click blank then click option'

A10

BTIM_CR1_CKD_1

CTIM_CR1_CEN

DTIM_CR1_CKD_0

Attempts:

3 left

💡 Hint

Common Mistakes

Not subtracting 1 for prescaler.

Using wrong clock division bits.

Forgetting to enable the counter.

Prescaler for divide by 10 is 9 (10 - 1). Clock division by 4 is TIM_CR1_CKD_1. Enable counter by setting TIM_CR1_CEN.

Practice

1. What is the main purpose of a timer prescaler in embedded C programming?

easy

A. To generate an interrupt on every clock cycle

B. To increase the CPU clock speed

C. To divide the main clock frequency and slow down the timer counting

D. To reset the timer counter automatically

Solution

1. Step 1: Understand the role of a prescaler

   A prescaler divides the main clock frequency to slow down the timer's counting speed.

2. Step 2: Compare options with prescaler function

   Only To divide the main clock frequency and slow down the timer counting correctly describes this function; others describe unrelated timer features.

3. Final Answer:

   To divide the main clock frequency and slow down the timer counting -> Option C

4. Quick Check:

   Prescaler divides clock = To slow timer [OK]

Hint: Prescaler always divides clock to slow timer [OK]

Common Mistakes:

• Confusing prescaler with timer reset
• Thinking prescaler speeds up the clock
• Assuming prescaler triggers interrupts

2. Which of the following is the correct way to set a prescaler value of 8 for a timer in embedded C?

easy

A. TCCR0 |= (1 << CS01);

B. TCCR0 |= (1 << CS00);

C. TCCR0 |= (1 << CS02);

D. TCCR0 |= (1 << CS01) | (1 << CS00);

Solution

1. Step 1: Recall prescaler bits for timer0

   For prescaler 8, only bit CS01 must be set.

2. Step 2: Match bits to options

   TCCR0 |= (1 << CS01); sets CS01 bit, correctly configuring prescaler 8.

3. Final Answer:

   TCCR0 |= (1 << CS01); -> Option A

4. Quick Check:

   Prescaler 8 = CS01 set only [OK]

Hint: Check datasheet bits for prescaler values [OK]

Common Mistakes:

• Setting multiple bits for prescaler 8
• Confusing bit positions for prescaler values
• Using wrong register for timer control

3. Given a microcontroller clock of 16 MHz and a timer prescaler set to 64, what is the timer tick frequency?

medium

A. 1,000,000 Hz

B. 250,000 Hz

C. 16,000,000 Hz

D. 64 Hz

Solution

1. Step 1: Calculate timer tick frequency

   Timer tick frequency = CPU clock / prescaler = 16,000,000 / 64 = 250,000 Hz.

2. Step 2: Compare with options

   250,000 Hz matches the calculated frequency exactly.

3. Final Answer:

   250,000 Hz -> Option B

4. Quick Check:

   16MHz/64 = 250kHz [OK]

Hint: Divide clock by prescaler for tick frequency [OK]

Common Mistakes:

• Multiplying instead of dividing clock by prescaler
• Using wrong prescaler value
• Confusing frequency units

4. Identify the error in this code snippet setting a prescaler of 256 for Timer1:

  TCCR1B = (1 << CS12) | (1 << CS10);

medium

A. CS12 bit is missing

B. No error, code is correct

C. TCCR1B register is incorrect for prescaler

D. CS10 should not be set for prescaler 256

Solution

1. Step 1: Check prescaler bits for 256 on Timer1

   Prescaler 256 requires only CS12 bit set; CS10 must be cleared.

2. Step 2: Analyze given code

   Code sets both CS12 and CS10 bits, which corresponds to prescaler 1024, not 256.

3. Final Answer:

   CS10 should not be set for prescaler 256 -> Option D

4. Quick Check:

   Prescaler 256 = only CS12 set [OK]

Hint: Only set bits matching prescaler exactly [OK]

Common Mistakes:

• Setting extra bits causing wrong prescaler
• Confusing prescaler bit combinations
• Assuming code is correct without checking datasheet

5. You want to measure a 1-second delay using a 16-bit timer with a 16 MHz clock. Which prescaler value should you choose to make the timer count up to 1 second without overflow? (Timer max count = 65535)

hard

A. Prescaler 1024

B. Prescaler 64

C. Prescaler 128

D. Prescaler 8

Solution

1. Step 1: Calculate timer tick frequency for each prescaler

   Tick frequency = 16,000,000 / prescaler. For 1024: 16,000,000 / 1024 ≈ 15,625 Hz.

2. Step 2: Calculate max timer duration

   Max duration = max count / tick frequency = 65535 / 15,625 ≈ 4.19 seconds, which covers 1 second.

3. Step 3: Check smaller prescalers

   Prescaler 128 gives 125,000 ticks per second, 64 gives 250,000, and 8 gives 2,000,000--all exceeding 65,535, causing overflow before 1 second.

4. Final Answer:

   Prescaler 1024 -> Option A

5. Quick Check:

   Prescaler 1024 allows 1s count without overflow [OK]

Hint: Choose prescaler so max count ≥ ticks in 1 second [OK]

Common Mistakes:

• Ignoring timer max count limit
• Choosing prescaler too small causing overflow
• Not calculating ticks per second correctly