Complete the code to set the timer prescaler to divide the clock by 8.
TIM->PSC = [1] - 1;
The prescaler register (PSC) divides the input clock by the value plus one. To divide by 8, set PSC to 7 (8 - 1).
Complete the code to configure the timer clock division to divide by 4.
TIM->CR1 |= [1];To set clock division to divide by 4, set CKD bits to '10', which corresponds to TIM_CR1_CKD_1.
Fix the error in the code to correctly set the prescaler for a 1 MHz timer clock from an 8 MHz source.
TIM->PSC = [1];To get 1 MHz from 8 MHz, divide by 8. Since PSC = division factor - 1, PSC should be 7.
Fill both blanks to create a timer configuration that sets prescaler to divide by 16 and clock division to divide by 2.
TIM->PSC = [1] - 1; TIM->CR1 |= [2];
Prescaler for divide by 16 is 15 (16 - 1). Clock division by 2 is set by TIM_CR1_CKD_0.
Fill all three blanks to configure a timer with prescaler dividing by 10, clock division dividing by 4, and enable the timer counter.
TIM->PSC = [1] - 1; TIM->CR1 |= [2]; TIM->CR1 |= [3];
Prescaler for divide by 10 is 9 (10 - 1). Clock division by 4 is TIM_CR1_CKD_1. Enable counter by setting TIM_CR1_CEN.