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Embedded Cprogramming~10 mins

SPI master-slave architecture in Embedded C - Step-by-Step Execution

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Concept Flow - SPI master-slave architecture
Master initiates communication
↓
Master sends clock pulses
↓
Master sends data bits
↓
Slave reads data bits on clock edges
↓
Slave sends data bits back (optional)
↓
Master reads slave data bits
↓
Communication ends when master stops clock
The SPI master controls the clock and data flow, sending bits to the slave while the slave reads and optionally sends data back, synchronized by the clock.
Execution Sample
Embedded C
void SPI_Master_Transmit(uint8_t data) {
    for (int i = 7; i >= 0; i--) {
        // Set MOSI according to data bit
        // Toggle clock
        // Read MISO if needed
    }
}
This code sends 8 bits from master to slave, one bit at a time, toggling the clock each time.
Execution Table
Bit IndexData Bit Sent (MOSI)Clock StateSlave Reads BitMaster Reads Bit (MISO)
71Low->HighReads 1Reads 0
60Low->HighReads 0Reads 1
51Low->HighReads 1Reads 0
41Low->HighReads 1Reads 1
30Low->HighReads 0Reads 0
20Low->HighReads 0Reads 1
11Low->HighReads 1Reads 0
00Low->HighReads 0Reads 1
----Communication ends after 8 bits
💡 All 8 bits sent and received, master stops clock to end communication
Variable Tracker
VariableStartAfter Bit 7After Bit 6After Bit 5After Bit 4After Bit 3After Bit 2After Bit 1After Bit 0Final
MOSI (Master Out Slave In)N/A10110010Last bit sent
ClockLowHighHighHighHighHighHighHighHighStopped
Slave Read BitN/A10110010All bits read
MISO (Master In Slave Out)N/A01010101All bits read by master
Key Moments - 3 Insights
Why does the master control the clock and not the slave?
The master controls the clock to synchronize data transfer; without the clock, the slave wouldn't know when to read or send bits. See execution_table rows where clock toggles before data read.
How does the slave know which bit is being sent?
The slave reads the MOSI line on the clock's rising edge, so each clock pulse tells the slave to read the next bit. This is shown in execution_table where slave reads bits on clock transitions.
Can the slave send data back at the same time?
Yes, SPI allows full-duplex communication; while master sends bits on MOSI, slave sends bits on MISO simultaneously, as seen in execution_table where master reads MISO each bit.
Visual Quiz - 3 Questions
Test your understanding
Look at the execution_table, what is the MOSI bit sent at Bit Index 4?
A0
B1
CDoes not send at Bit 4
DSame as Bit 7
💡 Hint
Check the 'Data Bit Sent (MOSI)' column at row with Bit Index 4
At which bit index does the master read a '1' from MISO for the first time?
ABit 7
BBit 4
CBit 6
DBit 0
💡 Hint
Look at 'Master Reads Bit (MISO)' column and find first '1'
If the clock stopped after Bit 2, what would happen?
ACommunication ends early, only 6 bits sent
BSlave sends all bits anyway
CMaster reads all 8 bits regardless
DClock stopping has no effect
💡 Hint
Refer to exit_note and understand clock controls data transfer
Concept Snapshot
SPI Master-Slave Architecture:
- Master controls clock and data flow
- Data sent bit-by-bit on MOSI line
- Slave reads bits on clock edges
- Slave can send data back on MISO simultaneously
- Communication ends when master stops clock
Full Transcript
SPI (Serial Peripheral Interface) uses a master-slave setup where the master controls the clock signal. The master sends data bits one by one on the MOSI line, toggling the clock each time. The slave reads these bits on the clock's rising edge. At the same time, the slave can send data back on the MISO line, which the master reads. This process continues for 8 bits or more, and communication ends when the master stops the clock. The master always controls timing to keep both sides in sync.

Practice

(1/5)
1. In SPI master-slave architecture, who controls the clock signal?
easy
A. The master device controls the clock signal.
B. The slave device controls the clock signal.
C. Both master and slave share clock control equally.
D. No clock signal is used in SPI communication.

Solution

  1. Step 1: Understand SPI roles

    In SPI, the master initiates communication and controls timing.
  2. Step 2: Identify clock control

    The master generates the clock signal to synchronize data transfer.
  3. Final Answer:

    The master device controls the clock signal. -> Option A
  4. Quick Check:

    Master controls clock = A [OK]
Hint: Master always controls clock in SPI [OK]
Common Mistakes:
  • Thinking slave controls clock
  • Assuming no clock is needed
  • Believing clock is shared equally
2. Which of the following is the correct way to select a slave device in SPI using embedded C?
easy
A. Send a special data byte to select the slave.
B. Set the slave select (SS) pin HIGH to select the slave.
C. Toggle the clock pin to select the slave.
D. Set the slave select (SS) pin LOW to select the slave.

Solution

  1. Step 1: Recall SPI slave selection method

    In SPI, the master selects a slave by pulling its SS pin LOW.
  2. Step 2: Understand pin logic

    Setting SS LOW activates the slave; HIGH deselects it.
  3. Final Answer:

    Set the slave select (SS) pin LOW to select the slave. -> Option D
  4. Quick Check:

    SS LOW selects slave = A [OK]
Hint: SS pin LOW means slave selected [OK]
Common Mistakes:
  • Setting SS HIGH to select slave
  • Using clock pin to select slave
  • Sending data to select slave
3. Given this embedded C code snippet for SPI master:
SPI_SS_PIN = 0; // Select slave
SPI_Write(0xA5); // Send data
SPI_SS_PIN = 1; // Deselect slave
What happens on the SPI bus during this code execution?
medium
A. The master selects the slave, sends 0xA5, then deselects the slave.
B. The slave sends 0xA5 to the master.
C. The master sends 0xA5 without selecting any slave.
D. The slave select pin stays HIGH, so no communication occurs.

Solution

  1. Step 1: Analyze slave select pin changes

    Setting SPI_SS_PIN to 0 selects the slave before sending data.
  2. Step 2: Understand data transmission

    SPI_Write(0xA5) sends data from master to selected slave.
  3. Step 3: Deselect slave after sending

    Setting SPI_SS_PIN to 1 ends communication by deselecting slave.
  4. Final Answer:

    The master selects the slave, sends 0xA5, then deselects the slave. -> Option A
  5. Quick Check:

    SS LOW + send data + SS HIGH = D [OK]
Hint: SS LOW before send, HIGH after send [OK]
Common Mistakes:
  • Assuming slave sends data
  • Ignoring slave select pin state
  • Thinking data sends without slave selected
4. Identify the error in this SPI master code snippet:
SPI_SS_PIN = 1; // Deselect slave
SPI_Write(0x3C); // Send data
SPI_SS_PIN = 0; // Select slave
medium
A. Data 0x3C is invalid for SPI communication.
B. Slave select pin is toggled correctly; no error.
C. Slave is deselected before sending data, so data won't be received.
D. SPI_Write function should be called after deselecting slave.

Solution

  1. Step 1: Check slave select pin timing

    Slave is deselected (SS=1) before sending data, so slave ignores data.
  2. Step 2: Correct order for SPI communication

    Slave must be selected (SS=0) before sending data to receive it.
  3. Final Answer:

    Slave is deselected before sending data, so data won't be received. -> Option C
  4. Quick Check:

    SS must be LOW before send = C [OK]
Hint: Select slave before sending data [OK]
Common Mistakes:
  • Sending data before selecting slave
  • Assuming data sends regardless of SS pin
  • Misunderstanding SPI_Write timing
5. You want to communicate with two SPI slaves using one master. Which approach correctly manages slave selection in embedded C?
hard
A. Connect both slaves to the same slave select pin and set it LOW to select both.
B. Use separate slave select pins for each slave and set only one LOW at a time.
C. Toggle the clock pin rapidly to switch between slaves.
D. Send a unique data byte to select each slave without changing slave select pins.

Solution

  1. Step 1: Understand multiple slave selection

    Each slave needs its own slave select pin controlled by the master.
  2. Step 2: Select only one slave at a time

    Set only one slave select pin LOW to activate that slave; others stay HIGH.
  3. Step 3: Avoid simultaneous selection

    Selecting multiple slaves at once causes bus conflicts and data errors.
  4. Final Answer:

    Use separate slave select pins for each slave and set only one LOW at a time. -> Option B
  5. Quick Check:

    Separate SS pins, one LOW at a time = B [OK]
Hint: One SS pin LOW per slave communication [OK]
Common Mistakes:
  • Using one SS pin for all slaves
  • Trying to select slaves by clock toggling
  • Selecting multiple slaves simultaneously
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