SPI master-slave architecture in Embedded C - Cheat Sheet & Quick Revision

Recall & Review

beginner

What is the role of the SPI master in SPI master-slave architecture?

The SPI master controls the clock signal and initiates communication with the slave devices. It sends data and receives data from the slaves.

beginner

What does the SPI slave do in the SPI master-slave architecture?

The SPI slave waits for the master to provide the clock and data signals. It responds to the master's commands by sending or receiving data.

beginner

Name the four main signals used in SPI communication.

The four main signals are: SCLK (Serial Clock), MOSI (Master Out Slave In), MISO (Master In Slave Out), and SS (Slave Select).

beginner

Why is the Slave Select (SS) line important in SPI?

The SS line tells the slave device when it should listen and respond. When SS is active (usually low), the slave is selected and communicates with the master.

intermediate

How does SPI achieve full-duplex communication?

SPI uses separate lines for sending (MOSI) and receiving (MISO) data, allowing the master and slave to send and receive data simultaneously.

Which SPI signal is controlled by the master to synchronize data transfer?

A MOSI

B SCLK

C MISO

D SS

The master controls the Serial Clock (SCLK) to synchronize data transfer between master and slave.

What happens when the Slave Select (SS) line is inactive (high)?

A The master stops sending clock

B The slave listens and responds

C The slave ignores communication

D Data is sent on MISO only

When SS is inactive (usually high), the slave ignores communication and does not respond.

In SPI, which line carries data from the master to the slave?

A MISO

B SCLK

C SS

D MOSI

MOSI stands for Master Out Slave In, carrying data from master to slave.

Which of the following is true about SPI communication?

A It is full-duplex

B It uses a single data line

C It does not use a clock

D It is half-duplex

SPI is full-duplex because it uses separate lines for sending and receiving data simultaneously.

Who generates the clock signal in SPI communication?

A Master

B Slave

C Both master and slave

D External oscillator

The master device generates the clock signal (SCLK) to control timing.

Explain the roles of master and slave in SPI master-slave architecture.

Think about who starts communication and who follows.

Describe how SPI achieves simultaneous sending and receiving of data.

Consider the data lines and clock signal.