PWM generation using timers in Embedded C - Cheat Sheet & Quick Revision

Recall & Review

beginner

What does PWM stand for and what is its main purpose in embedded systems?

PWM stands for Pulse Width Modulation. It is used to control the amount of power delivered to a device by switching the signal on and off rapidly, adjusting the width of the 'on' time.

beginner

How do timers help in generating PWM signals?

Timers count clock pulses and can be configured to toggle output pins at specific counts, creating a PWM signal by controlling the duty cycle and frequency.

beginner

What is 'duty cycle' in PWM?

Duty cycle is the percentage of one period in which the signal is 'on'. For example, a 50% duty cycle means the signal is on half the time and off half the time.

intermediate

In embedded C, which timer register is typically used to set the PWM duty cycle?

The Output Compare Register (OCR) is used to set the duty cycle by defining when the timer toggles the output pin within the timer period.

beginner

What happens if you set the duty cycle to 0% or 100% in PWM?

At 0% duty cycle, the output is always off (no signal). At 100% duty cycle, the output is always on (constant signal).

What does the timer's Output Compare Register (OCR) control in PWM generation?

A The duty cycle of the PWM signal

B The frequency of the clock

C The power supply voltage

D The input signal level

The OCR sets the point in the timer count when the output pin changes state, controlling the PWM duty cycle.

If you want a PWM signal with a 25% duty cycle, how long is the signal ON compared to the total period?

A 25% of the period

B 50% of the period

C 75% of the period

D 100% of the period

Duty cycle is the fraction of the period the signal is ON, so 25% means ON for 25% of the total period.

Which timer mode is commonly used to generate PWM signals?

A Sleep mode

B Normal counting mode

C Input capture mode

D Clear Timer on Compare Match (CTC) mode

CTC mode resets the timer on a compare match, allowing precise control of PWM frequency and duty cycle.

What is the effect of increasing the PWM frequency while keeping the duty cycle constant?

A The output voltage increases

B The duty cycle changes

C The signal switches ON and OFF faster

D The timer stops

Increasing frequency means the signal cycles faster, switching ON and OFF more times per second.

In embedded C, which hardware component is essential for PWM generation?

A UART module

B Timer/Counter peripheral

C ADC (Analog to Digital Converter)

D EEPROM memory

Timers or counters are used to generate PWM by counting clock pulses and toggling output pins.

Explain how a timer is configured to generate a PWM signal in embedded C.

Think about how the timer counts and toggles the output pin to create the PWM waveform.

Describe the relationship between PWM frequency, duty cycle, and the timer registers involved.

Consider how the timer counts up to a value and when it changes the output pin state.