Vector table relocation in ARM Architecture - Deep Dive

Overview - Vector table relocation

What is it?

Vector table relocation is the process of moving the interrupt vector table from its default memory location to a different address in memory. The vector table holds the addresses of interrupt handlers, which the processor uses to respond to events like hardware signals or exceptions. By relocating it, the system can customize interrupt handling or support features like bootloaders and operating systems. This is common in ARM-based systems to allow flexible control over interrupts.

Why it matters

Without vector table relocation, the processor would always look for interrupt handlers at a fixed memory address, limiting flexibility. This would make it hard to update or customize interrupt responses without rewriting the entire firmware. Relocation enables features like multi-stage boot processes, dynamic interrupt management, and better system modularity, which are essential for modern embedded systems and operating systems.

Where it fits

Before learning vector table relocation, you should understand basic ARM architecture concepts like interrupts, exception handling, and memory addressing. After mastering relocation, you can explore advanced topics like interrupt controller configuration, bootloader design, and real-time operating system (RTOS) interrupt management.

Mental Model

Core Idea

Vector table relocation lets the processor find interrupt handlers at a new memory address instead of a fixed default location.

Think of it like...

It's like moving the emergency phone numbers list from the front door to a more convenient spot inside the house, so anyone answering calls can quickly find the right number without running outside.

┌─────────────────────────────┐
│ Default Vector Table Address │
│ 0x00000000 (fixed location) │
└─────────────┬───────────────┘
              │
              ▼
┌─────────────────────────────┐
│ Relocated Vector Table       │
│ New address in RAM or flash │
└─────────────────────────────┘

Processor uses a register (e.g., VTOR) to point to the relocated table.

Build-Up - 7 Steps

1

Foundation

What is an Interrupt Vector Table

Concept: Introduce the interrupt vector table as a list of addresses for interrupt handlers.

In ARM processors, the interrupt vector table is a fixed list of memory addresses. Each address points to a function that handles a specific interrupt or exception. When an interrupt occurs, the processor looks up the corresponding address in this table to know where to jump and execute the handler.

Result

You understand that the vector table is essential for directing the processor to the right interrupt handler.

Knowing the vector table's role clarifies how interrupts are managed and why its location matters.

2

Foundation

Default Location of Vector Table in ARM

Concept: Explain the fixed default memory address where ARM processors expect the vector table.

By default, ARM processors expect the vector table at address 0x00000000 in memory. This is often in flash memory where the firmware starts. The processor fetches interrupt handler addresses from this fixed location unless told otherwise.

Result

You know the starting point and default behavior of interrupt handling in ARM.

Understanding the default location helps you see why relocation might be needed.

3

Intermediate

Why Relocate the Vector Table

🤔Before reading on: Do you think the vector table can only be at one fixed address, or can it be moved? Commit to your answer.

Concept: Introduce reasons and benefits for moving the vector table to a different memory address.

Sometimes, systems need to change the vector table location. For example, a bootloader might use the default address, then hand over control to an operating system that places its own vector table elsewhere. Relocation allows updating interrupt handlers without rewriting the bootloader or firmware at the default address.

Result

You see that relocation enables flexible system design and easier updates.

Knowing why relocation exists reveals its importance in complex embedded systems.

4

Intermediate

How ARM Supports Vector Table Relocation

🤔Before reading on: Do you think the processor uses a special register to find the vector table, or does it always look at the fixed address? Commit to your answer.

Concept: Explain the ARM processor feature that allows changing the vector table address using a special register.

ARM Cortex-M processors have a register called VTOR (Vector Table Offset Register). By writing a new address to VTOR, the processor will use that address as the base for the vector table instead of 0x00000000. This lets software relocate the vector table to RAM or another flash region.

Result

You understand the mechanism ARM provides for vector table relocation.

Recognizing the VTOR register's role is key to controlling interrupt handling locations.

5

Intermediate

Relocating Vector Table in Practice

Concept: Describe the steps to relocate the vector table in an ARM system.

To relocate the vector table, first place the new vector table at the desired memory address, often in RAM or a different flash section. Then, write the base address of this new table into the VTOR register. After this, the processor uses the relocated table for all interrupts and exceptions.

Result

You can perform vector table relocation to customize interrupt handling.

Knowing the practical steps bridges theory and real embedded system programming.

6

Advanced

Challenges and Considerations in Relocation

🤔Before reading on: Do you think relocating the vector table can cause problems if not done carefully? Commit to your answer.

Concept: Discuss potential issues like alignment requirements, cache effects, and interrupt timing when relocating the vector table.

The vector table must be aligned to certain boundaries (e.g., 128-byte aligned) for the processor to read it correctly. Also, if relocated to RAM, the table must be initialized before enabling interrupts. Cache and memory protection settings can affect access. Improper relocation can cause system crashes or missed interrupts.

Result

You appreciate the technical details needed for safe relocation.

Understanding these challenges prevents common bugs and system failures.

7

Expert

Advanced Uses and Internals of Vector Table Relocation

🤔Before reading on: Do you think vector table relocation is only about moving addresses, or does it affect system security and multitasking? Commit to your answer.

Concept: Explore how relocation supports advanced features like dynamic interrupt management, security zones, and multi-core systems.

In complex systems, vector table relocation enables switching interrupt contexts dynamically, isolating secure and non-secure interrupts, and supporting multiple cores with separate tables. Internally, the processor uses VTOR with masking and alignment logic to fetch vectors efficiently. Some ARM variants allow partial relocation or remapping for fine-grained control.

Result

You see how relocation is a foundation for sophisticated system designs.

Knowing these advanced aspects reveals the full power and complexity behind vector table relocation.

Under the Hood

The processor uses the VTOR register to hold the base address of the vector table. When an interrupt occurs, it calculates the vector address by adding an offset (based on the interrupt number) to the VTOR value. The processor then fetches the handler address from this computed location. The VTOR must be aligned to a boundary (e.g., 128 bytes) to ensure correct indexing. Internally, the hardware uses masking to enforce alignment and prevent invalid accesses.

Why designed this way?

Originally, ARM processors had a fixed vector table location for simplicity and speed. As systems grew more complex, the need for flexibility led to the VTOR register's introduction. This design balances backward compatibility with modern needs, allowing relocation without changing the core interrupt mechanism. Alternatives like fully dynamic vector tables were avoided to keep interrupt latency low and hardware simple.

┌───────────────────────────────┐
│          Processor            │
│ ┌───────────────┐             │
│ │   VTOR Reg    │◄────────────┤
│ └───────────────┘             │
│          │                    │
│          ▼                    │
│ ┌─────────────────────────┐  │
│ │ Vector Table Base Addr   │  │
│ └─────────────────────────┘  │
│          │                    │
│          + Offset (IRQ #)    │
│          ▼                    │
│ ┌─────────────────────────┐  │
│ │ Interrupt Handler Addr   │  │
│ └─────────────────────────┘  │
│          │                    │
│          ▼                    │
│    Jump to Handler           │
└───────────────────────────────┘

Myth Busters - 4 Common Misconceptions

Quick: Does relocating the vector table automatically move all interrupt handlers? Commit yes or no.

Common Belief: If you relocate the vector table, all interrupt handlers move automatically with it.

Reality: Relocating the vector table only changes where the processor looks for handler addresses; the handlers themselves must be placed and linked correctly at the new location.

Why it matters: Assuming handlers move automatically can cause the processor to jump to invalid addresses, leading to crashes.

Quick: Is it safe to relocate the vector table to any random memory address? Commit yes or no.

Common Belief: You can relocate the vector table to any memory address you want without restrictions.

Reality: The new vector table address must meet alignment requirements and be in accessible memory; otherwise, the processor may fail to fetch vectors correctly.

Why it matters: Ignoring alignment or memory access rules causes unpredictable interrupt behavior and system instability.

Quick: Does the VTOR register exist in all ARM processors? Commit yes or no.

Common Belief: All ARM processors have a VTOR register to relocate the vector table.

Reality: Only certain ARM cores, like Cortex-M3 and later, have VTOR; older or different ARM cores may not support vector table relocation.

Why it matters: Assuming VTOR exists everywhere can lead to incorrect system design and failed relocations.

Quick: Does relocating the vector table improve interrupt latency? Commit yes or no.

Common Belief: Moving the vector table to RAM always makes interrupt handling faster.

Reality: While RAM access can be faster, relocation itself doesn't guarantee lower latency; factors like cache, memory speed, and system design also affect performance.

Why it matters: Expecting automatic speed improvements can lead to misguided optimizations and overlooked bottlenecks.

Expert Zone

1

Relocating the vector table to RAM allows dynamic modification of interrupt handlers at runtime, enabling features like patching or hot-swapping handlers without rebooting.

2

Some ARM processors support partial vector table relocation or remapping, allowing only certain interrupts to be redirected, which is useful in multi-core or secure/non-secure environments.

3

The VTOR register's alignment requirements are tied to the number of supported interrupts; understanding this helps optimize memory usage and avoid wasted space.

When NOT to use

Vector table relocation is not suitable for very simple or legacy ARM cores without VTOR support; in such cases, fixed vector tables or software interrupt dispatching should be used. Also, if system security requires immutable interrupt vectors, relocation might be restricted or disabled.

Production Patterns

In production, bootloaders often use the default vector table, then relocate it to RAM or a protected flash region when handing control to an OS. RTOS kernels relocate the vector table to manage task-specific interrupts. Secure systems use relocation combined with memory protection units to isolate interrupt handling between secure and non-secure worlds.

Connections

Memory Management Unit (MMU)

Vector table relocation builds on memory mapping and protection concepts managed by the MMU.

Understanding MMU helps grasp how relocated vector tables can be protected or remapped dynamically for security and stability.

Bootloader Design

Vector table relocation is a key technique used in bootloaders to transition control to operating systems with their own interrupt handlers.

Knowing relocation clarifies how bootloaders enable flexible system startup sequences.

Operating System Interrupt Handling

Relocated vector tables allow operating systems to implement advanced interrupt management and multitasking.

Understanding relocation deepens comprehension of OS-level interrupt abstractions and scheduling.

Common Pitfalls

#1 Relocating vector table without proper alignment.

Wrong approach:

VTOR = 0x20000001; // Unaligned address

Correct approach:

VTOR = 0x20000000; // Properly aligned address

Root cause:

Misunderstanding that VTOR requires alignment to specific boundaries causes processor to misread vector entries.

#2 Not initializing the relocated vector table before enabling interrupts.

Wrong approach:

Set VTOR to new address, then enable interrupts immediately without copying vector data.

Correct approach:

Copy vector table to new location, set VTOR, then enable interrupts.

Root cause:

Assuming relocation alone is enough without preparing the new vector table leads to undefined interrupt behavior.

#3 Assuming all ARM cores support VTOR register.

Wrong approach:

Writing to VTOR on an ARM7 core that lacks this register.

Correct approach:

Use fixed vector table or software dispatching on cores without VTOR.

Root cause:

Not verifying processor capabilities causes invalid register access and system faults.

Key Takeaways

The interrupt vector table is a critical list of addresses that the ARM processor uses to handle interrupts and exceptions.

Vector table relocation allows moving this table from its fixed default address to a new location, enabling flexible and modular system designs.

ARM processors with VTOR registers support relocation by pointing to the new vector table base address, but alignment and initialization are essential for correct operation.

Misunderstanding relocation can cause system crashes, so careful attention to processor capabilities, memory alignment, and vector table setup is necessary.

Advanced systems use vector table relocation to support dynamic interrupt management, security separation, and multi-stage boot processes.

Practice

1. What is the primary purpose of relocating the vector table in ARM architecture?

easy

A. To increase the processor clock speed

B. To change the base address where interrupt handlers are located

C. To enable floating-point operations

D. To disable interrupts permanently

Solution

1. Step 1: Understand the vector table role

   The vector table contains addresses of interrupt handlers used by the processor.

2. Step 2: Purpose of relocation

   Relocation changes the base address so the processor knows where to find these handlers in memory.

3. Final Answer:

   To change the base address where interrupt handlers are located -> Option B

4. Quick Check:

   Vector table relocation = changing interrupt handler base address [OK]

Hint: Vector table relocation changes interrupt handler address base [OK]

Common Mistakes:

• Confusing relocation with clock speed changes
• Thinking relocation disables interrupts
• Assuming relocation enables floating-point

2. Which ARM register is used to relocate the vector table base address?

easy

A. VTOR (Vector Table Offset Register)

B. SP (Stack Pointer)

C. LR (Link Register)

D. PC (Program Counter)

Solution

1. Step 1: Identify the register for vector table base

   The VTOR register holds the base address of the vector table in ARM processors.

2. Step 2: Confirm other registers' roles

   PC controls instruction flow, LR stores return address, SP manages stack; none relocate vector table.

3. Final Answer:

   VTOR (Vector Table Offset Register) -> Option A

4. Quick Check:

   VTOR = vector table base register [OK]

Hint: VTOR register sets vector table base address [OK]

Common Mistakes:

• Confusing PC with VTOR
• Using LR or SP for vector table relocation
• Not knowing VTOR purpose

3. Given the following code snippet in ARM assembly, what is the effect of the instruction?
MOV R0, #0x20000000
STR R0, [VTOR]

medium

A. Enables interrupts globally

B. Resets the processor

C. Sets the vector table base address to 0x20000000

D. Clears the vector table

Solution

1. Step 1: Analyze MOV instruction

   MOV R0, #0x20000000 loads the address 0x20000000 into register R0.

2. Step 2: Analyze STR instruction

   STR R0, [VTOR] stores the value in R0 into the VTOR register, relocating the vector table base.

3. Final Answer:

   Sets the vector table base address to 0x20000000 -> Option C

4. Quick Check:

   STR to VTOR = relocate vector table base [OK]

Hint: STR to VTOR sets new vector table base address [OK]

Common Mistakes:

• Thinking it resets the processor
• Assuming it enables interrupts
• Believing it clears the vector table

4. A developer tries to relocate the vector table by writing to VTOR but the interrupts still point to the old addresses. What is the most likely cause?

medium

A. The stack pointer is incorrectly set

B. The processor clock is too slow

C. The interrupt handlers are missing

D. VTOR register is write-protected or not enabled for writing

Solution

1. Step 1: Understand VTOR write requirements

   VTOR may be write-protected or require special permissions to update its value.

2. Step 2: Check other options

   Clock speed or stack pointer issues do not affect vector table relocation; missing handlers cause faults but not relocation failure.

3. Final Answer:

   VTOR register is write-protected or not enabled for writing -> Option D

4. Quick Check:

   VTOR write protection blocks relocation [OK]

Hint: Check VTOR write permissions if relocation fails [OK]

Common Mistakes:

• Blaming clock speed for relocation issues
• Confusing stack pointer with vector table base
• Assuming missing handlers prevent relocation

5. In a system with multiple memory regions, how can vector table relocation improve system flexibility?

hard

A. By allowing the vector table to be moved to RAM for dynamic interrupt handler updates

B. By increasing the processor's clock frequency automatically

C. By disabling unused interrupts permanently

D. By encrypting the interrupt handlers for security

Solution

1. Step 1: Understand relocation benefits

   Relocating the vector table to RAM allows changing interrupt handlers at runtime, improving flexibility.

2. Step 2: Evaluate other options

   Clock frequency changes, disabling interrupts, or encryption are unrelated to vector table relocation.

3. Final Answer:

   By allowing the vector table to be moved to RAM for dynamic interrupt handler updates -> Option A

4. Quick Check:

   Relocation enables dynamic interrupt handler updates [OK]

Hint: Relocate vector table to RAM for flexible interrupt updates [OK]

Common Mistakes:

• Thinking relocation changes clock speed
• Assuming relocation disables interrupts
• Believing relocation encrypts handlers