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What is wrong with this code to enable ADC clock?

medium📝 Analysis Q7 of 15
ARM Architecture - Bus Architecture
What is wrong with this code to enable ADC clock?
RCC->APB2ENR |= (1 << 9);
RCC->APB2ENR &= ~(1 << 9);
ABit 9 does not control ADC clock
BIncorrect register used
CMissing clock enable delay
DClock is enabled then immediately disabled
Step-by-Step Solution
Solution:
  1. Step 1: Analyze sequence of operations

    First line enables ADC clock by setting bit 9.
  2. Step 2: Effect of second line

    Second line clears bit 9, disabling the clock immediately.
  3. Final Answer:

    Clock is enabled then immediately disabled -> Option D
  4. Quick Check:

    Enable then disable cancels out [OK]
Quick Trick: Avoid clearing bits right after setting them [OK]
Common Mistakes:
  • Not noticing immediate disable
  • Wrong bit assumption
  • Ignoring operation order

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