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In a nested exception scenario, how does ARM architecture handle multiple exception entries and exits correctly?

hard📝 Application Q9 of 15
ARM Architecture - Exception and Interrupt Model
In a nested exception scenario, how does ARM architecture handle multiple exception entries and exits correctly?
ABy ignoring new exceptions until current one finishes
BBy stacking SPSR and LR for each exception level
CBy resetting SPSR and LR on each new exception
DBy switching to User mode between exceptions
Step-by-Step Solution
Solution:

  1. Step 1: Understand nested exceptions

    Multiple exceptions require saving state for each level.

  2. Step 2: ARM stacks SPSR and LR to preserve each exception context

    This stacking allows correct return from nested exceptions.

  3. Final Answer:

    By stacking SPSR and LR for each exception level -> Option B

  4. Quick Check:

    Nested exceptions stack SPSR and LR [OK]
Quick Trick: Stack SPSR and LR to handle nested exceptions [OK]
Common Mistakes:
  • Ignoring new exceptions
  • Resetting SPSR and LR losing context
  • Switching to User mode prematurely

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