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FreeRTOSprogramming~20 mins

Deferred interrupt processing architecture in FreeRTOS - Practice Problems & Coding Challenges

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Challenge - 5 Problems
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Deferred Interrupt Master
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Predict Output
intermediate
2:00remaining
Output of Deferred Interrupt Handler Execution

Consider a FreeRTOS system where an interrupt service routine (ISR) defers processing to a task using a queue. What will be the output of the following code snippet when the interrupt triggers?

FreeRTOS
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"

QueueHandle_t xQueue;

void vDeferredTask(void *pvParameters) {
    int receivedValue;
    while(1) {
        if(xQueueReceive(xQueue, &receivedValue, portMAX_DELAY) == pdPASS) {
            printf("Processed value: %d\n", receivedValue);
        }
    }
}

void vISR_Handler(void) {
    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
    int valueToSend = 42;
    xQueueSendFromISR(xQueue, &valueToSend, &xHigherPriorityTaskWoken);
    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}

int main() {
    xQueue = xQueueCreate(5, sizeof(int));
    xTaskCreate(vDeferredTask, "DeferredTask", 1000, NULL, 1, NULL);
    vISR_Handler();
    vTaskStartScheduler();
    return 0;
}
ARuntime error: Queue not created
BNo output, task never receives data
CCompilation error due to missing ISR attribute
DProcessed value: 42
Attempts:
2 left
💡 Hint

Think about how the ISR sends data to the queue and how the task waits for data.

🧠 Conceptual
intermediate
1:30remaining
Understanding Deferred Interrupt Processing Benefits

Which of the following is the main advantage of using deferred interrupt processing in an embedded system?

AIt guarantees that all interrupts are processed in the order they occur.
BIt reduces ISR execution time by deferring heavy processing to tasks, improving system responsiveness.
CIt eliminates the need for interrupt priorities in the system.
DIt allows the ISR to execute lengthy code without blocking other interrupts.
Attempts:
2 left
💡 Hint

Consider how deferring work affects interrupt latency and system responsiveness.

🔧 Debug
advanced
2:30remaining
Debugging Deferred Interrupt Queue Overflow

In a FreeRTOS system, a deferred interrupt processing task reads from a queue filled by an ISR. The system sometimes crashes with a stack overflow error. Which code snippet below most likely causes this issue?

FreeRTOS
void vISR_Handler(void) {
    BaseType_t xHigherPriorityTaskWoken = pdFALSE;
    int valueToSend = 100;
    for(int i = 0; i < 10; i++) {
        xQueueSendFromISR(xQueue, &valueToSend, &xHigherPriorityTaskWoken);
    }
    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
AThe ISR sends multiple items without checking if the queue is full, causing overflow.
BThe ISR uses a local variable for xHigherPriorityTaskWoken, which is incorrect.
CThe ISR does not call portYIELD_FROM_ISR, so the task never runs.
DThe task reading the queue uses a blocking call with zero timeout.
Attempts:
2 left
💡 Hint

Think about what happens if the ISR sends more items than the queue can hold.

📝 Syntax
advanced
1:30remaining
Identify Syntax Error in Deferred Interrupt Code

Which option contains a syntax error that prevents the deferred interrupt processing code from compiling?

FreeRTOS
void vISR_Handler(void) {
    BaseType_t xHigherPriorityTaskWoken = pdFALSE
    int valueToSend = 10;
    xQueueSendFromISR(xQueue, &valueToSend, &xHigherPriorityTaskWoken);
    portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
AMissing semicolon after initializing xHigherPriorityTaskWoken.
BUsing xQueueSend instead of xQueueSendFromISR inside ISR.
CIncorrect function return type for ISR handler.
DIncorrect pointer usage in xQueueSendFromISR call.
Attempts:
2 left
💡 Hint

Look carefully at each line for missing punctuation.

🚀 Application
expert
3:00remaining
Designing Deferred Interrupt Processing with Multiple Priorities

You need to design a deferred interrupt processing system in FreeRTOS where two ISRs with different priorities defer work to tasks. The high priority ISR defers critical data, and the low priority ISR defers less critical data. Which design approach below best ensures that critical data is processed first without blocking the system?

AUse one queue and one task; the task uses a priority field in data to decide processing order.
BUse a single queue for both ISRs and one task that processes data in the order received.
CUse two separate queues and two tasks with different priorities; the high priority task processes critical data, the low priority task processes less critical data.
DUse two queues but a single low priority task that processes both queues alternately.
Attempts:
2 left
💡 Hint

Consider how task priorities and separate queues affect processing order and responsiveness.