Practice - 5 Tasks
Answer the questions below
1fill in blank
easyComplete the code to declare an ISR function for TIMER0 overflow.
Embedded C
void TIMER0_OVF_vect(void) [1] {
// ISR code here
} Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Using 'void' instead of 'interrupt' keyword.
Forgetting to declare the function as an ISR.
✗ Incorrect
The keyword 'interrupt' is used to declare an ISR function in embedded C for many compilers.
2fill in blank
mediumComplete the code to enable the TIMER0 overflow interrupt by setting the correct bit.
Embedded C
TIMSK |= (1 << [1]);
Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Choosing bits related to TIMER1 instead of TIMER0.
Using Output Compare Interrupt Enable bits instead of Overflow.
✗ Incorrect
TOIE0 is the Timer/Counter0 Overflow Interrupt Enable bit.
3fill in blank
hardFix the error in the ISR declaration syntax.
Embedded C
void [1](void) interrupt 5 { // ISR code }
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Attempts:
3 left
💡 Hint
Common Mistakes
Using incorrect ISR function names.
Using generic names like 'ISR' without vector suffix.
✗ Incorrect
The correct ISR name for TIMER0 overflow is 'TIMER0_OVF_vect' in many embedded C compilers.
4fill in blank
hardFill both blanks to correctly clear the interrupt flag inside the ISR.
Embedded C
void TIMER1_OVF_vect(void) {
[1] &= ~(1 << [2]); // Clear interrupt flag
} Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Trying to clear flags in TIMSK instead of TIFR.
Using wrong flag bits like OCF1A.
✗ Incorrect
The interrupt flag for TIMER1 overflow is TOV1, and it is cleared by writing 0 to the bit in TIFR register.
5fill in blank
hardFill all three blanks to write an ISR that increments a counter and clears the interrupt flag.
Embedded C
volatile int counter = 0; void [1](void) { counter[2]; [3] &= ~(1 << TOV0); }
Drag options to blanks, or click blank then click option'
Attempts:
3 left
💡 Hint
Common Mistakes
Using wrong ISR names.
Using += 1 instead of ++ (though valid, ++ is simpler here).
Clearing flags in TIMSK instead of TIFR.
✗ Incorrect
The ISR name is TIMER0_OVF_vect, increment operator is ++, and the interrupt flag register is TIFR.