IRQ vs FIQ in ARM: Key Differences and Usage Guide

In ARM architecture, IRQ (Interrupt Request) is a standard interrupt with lower priority, while FIQ (Fast Interrupt Request) is a higher priority interrupt designed for faster response. FIQ uses more banked registers to reduce latency, making it suitable for time-critical tasks.

Quick Comparison

This table summarizes the main differences between IRQ and FIQ in ARM processors.

Feature	IRQ (Interrupt Request)	FIQ (Fast Interrupt Request)
Priority	Lower priority	Higher priority
Latency	Higher latency	Lower latency (faster)
Banked Registers	Fewer banked registers	More banked registers (R8-R14)
Use Case	General interrupts	Time-critical interrupts
Interrupt Vector Address	0x18	0x1C
Enabled By	CPSR I bit cleared	CPSR F bit cleared

Key Differences

IRQ and FIQ are two types of interrupts in ARM designed to handle different priority levels. FIQ has a higher priority than IRQ, meaning it can interrupt IRQ handlers but not vice versa. This makes FIQ suitable for urgent tasks that need immediate attention.

One major difference is in register usage: FIQ mode has more banked registers (R8 to R14) dedicated to it, which allows the processor to switch to the interrupt handler without saving and restoring many registers. This reduces the interrupt latency significantly compared to IRQ, which has fewer banked registers and requires more context saving.

Additionally, IRQ and FIQ have different vector addresses where the processor jumps when the interrupt occurs: IRQ uses address 0x18, while FIQ uses 0x1C. The processor enables or disables these interrupts by setting or clearing bits in the CPSR (Current Program Status Register): the I bit for IRQ and the F bit for FIQ.

IRQ Code Example

This example shows a simple ARM assembly routine handling an IRQ interrupt by saving minimal registers and returning.

armasm

IRQ_Handler:
    SUB    SP, SP, #4       ; Make space on stack
    STR    LR, [SP]         ; Save return address
    ; Handle IRQ interrupt task here
    LDR    LR, [SP]         ; Restore return address
    ADD    SP, SP, #4       ; Clean stack
    SUBS   PC, LR, #4       ; Return from interrupt

FIQ Equivalent

This ARM assembly example shows a FIQ handler using banked registers to avoid saving/restoring many registers, enabling faster interrupt response.

armasm

FIQ_Handler:
    ; Banked registers R8-R14 are used automatically
    ; Handle FIQ interrupt task here
    SUBS   PC, LR, #4       ; Return from interrupt

When to Use Which

Choose FIQ when you need the fastest possible interrupt response for critical tasks like real-time data processing or emergency handling, as it has higher priority and lower latency. Use IRQ for general-purpose interrupts where speed is less critical and multiple devices may share the interrupt line. This separation helps optimize system responsiveness and resource use.

Key Takeaways

FIQ has higher priority and lower latency than IRQ in ARM processors.

FIQ uses more banked registers to speed up interrupt handling.

IRQ is suitable for general interrupts with lower urgency.

FIQ is best for time-critical, fast-response tasks.

Different vector addresses and CPSR bits control IRQ and FIQ.