Bird
0
0

Which ARM assembly instruction sequence correctly enables the Memory Protection Unit (MPU)?

easy📝 Factual Q3 of 15
ARM Architecture - Bus Architecture
Which ARM assembly instruction sequence correctly enables the Memory Protection Unit (MPU)?
AMOV R0, #1; STR R0, [MPU_CTRL]
BLDR R0, =0xE000ED94; MOV R1, #1; STR R1, [R0]
CLDR R0, =MPU_CTRL; MOV R1, #0; STR R1, [R0]
DLDR R0, =MPU_CTRL; MOV R1, #1; STR R1, [R0]
Step-by-Step Solution
Solution:
  1. Step 1: Identify MPU control register address

    MPU_CTRL is typically at 0xE000ED94.
  2. Step 2: Enable MPU by writing 1

    Writing 1 to MPU_CTRL enables the MPU.
  3. Step 3: Match instruction sequence

    LDR R0, =0xE000ED94; MOV R1, #1; STR R1, [R0] loads MPU_CTRL address, moves 1 into R1, and stores R1 to MPU_CTRL.
  4. Final Answer:

    LDR R0, =0xE000ED94; MOV R1, #1; STR R1, [R0] -> Option B
  5. Quick Check:

    Enable MPU by writing 1 to MPU_CTRL [OK]
Quick Trick: Enable MPU by writing 1 to MPU_CTRL register [OK]
Common Mistakes:
  • Using wrong MPU control register address
  • Writing 0 instead of 1 to enable MPU
  • Confusing register names or values

Want More Practice?

15+ quiz questions · All difficulty levels · Free

Free Signup - Practice All Questions
More ARM Architecture Quizzes