Choose the option that best describes the main role of the TLB in a computer system.
Think about how the CPU quickly finds where data is in physical memory when using virtual memory.
The TLB is a small cache that keeps recent virtual-to-physical address mappings. This helps the CPU avoid slow lookups in the page table every time it accesses memory.
When the CPU looks for a virtual address in the TLB and does not find it, what is the next step?
Consider how the system handles address translation when the TLB does not have the needed entry.
On a TLB miss, the system consults the page table to find the correct physical address, then updates the TLB with this new mapping for faster future access.
Analyze the impact of increasing the size of the TLB on system performance and explain the trade-offs involved.
Think about how cache size and speed relate to each other in hardware design.
Increasing TLB size can reduce misses, improving performance. However, larger TLBs take more time to search and add hardware complexity, which can slow down access.
Which statement correctly compares fully associative and set-associative TLBs?
Consider how entries are organized and searched in different cache types.
Fully associative TLBs can store any entry in any slot, allowing flexible placement but requiring more complex hardware. Set-associative TLBs divide entries into sets, limiting where entries can go but simplifying lookup.
Explain the reason for clearing the TLB when switching from one process to another.
Think about how virtual memory addresses differ between processes.
Each process has its own virtual address space. Flushing the TLB removes old translations so the CPU does not use incorrect physical addresses from the previous process.