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A CPU accesses a virtual address and the TLB results in a hit. Which sequence of events correctly describes what happens next?

easy🧠🧾 Concept Trace Q3 of Q15
Operating Systems - TLB - Translation Lookaside Buffer & Effective Access Time
A CPU accesses a virtual address and the TLB results in a hit. Which sequence of events correctly describes what happens next?
AThe TLB entry is invalidated and the page table walk begins
BThe physical address is retrieved from the TLB and memory is accessed directly without consulting the page table
CA page fault is triggered to update the TLB before accessing memory
DThe page table is checked to verify the TLB entry before accessing physical memory
Step-by-Step Solution
Solution:
  1. Step 1: Understand TLB hit

    A TLB hit means the translation is found in the TLB cache.
  2. Step 2: Follow the correct sequence

    A: Incorrect -- TLB entry is not invalidated on a hit.
    B: Incorrect -- page table is not checked on a TLB hit.
    C: Incorrect -- page fault occurs only on invalid or missing pages.
    D: Correct -- physical address is retrieved from the TLB and memory is accessed directly without consulting the page table.
  3. Final Answer:

    Option B -> Option B
  4. Quick Check:

    TLB hit bypasses page table walk [OK]
Quick Trick: TLB hit means direct physical address access [OK]
Common Mistakes:
MISTAKES
  • Thinking page table is always checked
  • Confusing TLB hit with page fault
  • Assuming TLB entry invalidation on hit
Trap Explanation:
PITFALL
  • Candidates often incorrectly believe page table is consulted on every access.
Interviewer Note:
CONTEXT
  • Checks understanding of TLB hit behavior and memory access flow.
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