Operating Systems - TLB - Translation Lookaside Buffer & Effective Access Time
Trace the sequence of events when a CPU accesses a virtual address and the TLB results in a miss. What happens next?
Trace the sequence of events when a CPU accesses a virtual address and the TLB results in a miss. What happens next?
easy🧠🧾 Concept Trace Q12 of Q15
Step-by-Step Solution
Step 1: Identify TLB miss consequence
A TLB miss means the translation is not cached, so the system must look up the page table.Step 2: Follow the steps
On a miss, the page table is consulted to get the physical frame number.
The TLB is updated with this translation for future accesses.
Then the memory access proceeds using the physical address.Step 3: Analyze incorrect options
A: Page fault only occurs if the page is not in memory, not on every TLB miss.
B: TLB does not fetch from disk; page table lookup is in memory.
C: CPU does not retry blindly; it performs page table lookup.Final Answer:
Option A -> Option AQuick Check:
TLB miss triggers page table lookup and TLB update before memory access.
Quick Trick: TLB miss -> page table lookup -> TLB update -> memory access [OK]
Common Mistakes:
MISTAKES- Confusing TLB miss with page fault
- Thinking TLB fetches translations from disk
Trap Explanation:
PITFALL- Option A confuses TLB miss with page fault; option B wrongly assumes TLB fetches from disk, which it does not.
Interviewer Note:
CONTEXT- Tests candidate's understanding of the address translation flow on TLB miss.
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